EDBT 2026 Demo / reviewers in the wild / expert
Sung-Ming Wu
dblp:24/8515
· DBLP profile ↗
7ranked-venue papers
4as first author
2since 2021 · last 2022
0000-0003-3352-9771ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 3 first-author · 2 since 2021Computer networks · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Storage systems · 72% Memory systems · 28% | |
| Computer networks
1 paper |
Physical-layer communications · 100% |
Topics — the 13 heaviest of 13, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems
key-value storage |
0.7 | 2 | 2022 | Rethinking key-value store for byte-addressable optane persistent memory · DAC 2022 Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Memory systems › non-volatile memory › persistent memory
byte-addressable persistent memory |
0.6 | 1 | 2022 | Rethinking key-value store for byte-addressable optane persistent memory · DAC 2022 |
Memory systems
non-volatile memory |
0.6 | 1 | 2022 | Rethinking key-value store for byte-addressable optane persistent memory · DAC 2022 |
Storage systems › key-value storage
persistent memory key-value store |
0.6 | 1 | 2022 | Rethinking key-value store for byte-addressable optane persistent memory · DAC 2022 |
Storage systems
flash and SSD |
0.5 | 1 | 2021 | Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Storage systems › flash and SSD › flash memory management
flash translation layer |
0.5 | 1 | 2021 | Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Storage systems › flash and SSD › flash memory management › garbage collection
write amplification |
0.5 | 1 | 2021 | Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Storage systems › key-value storage
LSM-tree |
0.1 | 1 | 2021 | Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Physical-layer communications
code-division multiple access |
0.1 | 1 | 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels · IEEE Trans. Commun. 2011 |
Physical-layer communications › spread spectrum › frequency hopping
frequency-hopping CDMA |
0.1 | 1 | 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels · IEEE Trans. Commun. 2011 |
Physical-layer communications
modulation |
0.1 | 1 | 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels · IEEE Trans. Commun. 2011 |
Physical-layer communications
spread spectrum |
0.1 | 1 | 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels · IEEE Trans. Commun. 2011 |
Physical-layer communications
spectral efficiency |
0.0 | 1 | 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels · IEEE Trans. Commun. 2011 |
Methods — techniques the papers use, named apart from their topics
garbage collection · 0.5dynamic striping · 0.5performance analysis · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Rethinking key-value store for byte-addressable optane persistent memoryabstractOptane Persistent Memory (PM) is a pioneering solution to byte-addressable PM for commodity systems. However, the performance of Optane PM is highly workload-sensitive, rendering many prior designs of Key-Value (KV) store inefficient. To cope with this reality, we advocate rethinking KV store design for Optane PM. Our design follows a principle of Single-stream Writing with managed Multi-stream Reading (SWMR): Incoming KV pairs are written to PM through a single write stream and managed by an ordered index in DRAM. Through asynchronously sorting and rewriting large sets of KV pairs, range queries are handled with a managed number of concurrent streams. YCSB results show that our design improved upon existing ones by 116% and 21% for write-only throughput and read-write throughput, respectively. Sung-Ming Wu, Li-Pin Chang |
DAC | 1 |
| 2021 | Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDsabstractLog-structured-merge (LSM) trees are a highly write-optimized data structure for lightweight, high-performance key-value (KV) stores. Furthermore, solid-state drives (SSDs) are a crucial component for I/O acceleration. Conventional LSM-over-SSD designs involve multiple software layers, including the LSM tree, host file system, and flash translation layer (FTL), which introduce cascading write amplifications. To manage the write amplifications from different layers, we propose KVSSDs, which are a close integration of LSM trees and the FTL. KVSSDs exploit the FTL mapping mechanism to implement copy-free compaction of LSM trees, and they enables direct data allocation in flash memory for efficient garbage collection. Our design also uses a fine-grained, dynamic striping policy to fully exploit the rich internal parallelism of multichip SSDs. The experimental results indicated that our LSM-SSD integrated design reduced the write amplification by 86% and improved the throughput by 383% compared with a conventional LSM-over-SSD design. Sung-Ming Wu, Kai-Hsiang Lin, Li-Pin Chang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2019 | Adaptive Write Interference Management with Efficient Mapping for Shingled Recording Disks
Ming-Chang Lee, Li-Pin Chang, Sung-Ming Wu, Wei-Shang Yui |
ICCD | 3 |
| 2019 | Learning-Assisted Write Latency Optimization for Mobile StorageabstractI/O activities of mobile storage are highly synchronous. Flash garbage collection activities in mobile storage introduce extra delay to write requests and negatively impact on user perceived-latency. Runtime write demand is subject to correlation between multiple parameters, such as network connectivity, GPS coordinates, and current time. We propose predicting write demand with a learning algorithm, XGBoost, and conducting background, rate-based garbage collection to optimize write latency without premature, excessive flash erasure. Our method reduced the 99-th percentile write latency by 56% compared to on-demand garbage collection and decreased flash erase count by 51% compared to unconditional background garbage collection. Wei-Chu Tsai, Sung-Ming Wu, Li-Pin Chang |
RTCSA | 2 |
| 2018 | KVSSD: Close integration of LSM trees and flash translation layer for write-efficient KV storeabstractLog-Structured-Merge (LSM) trees are a write-optimized data structure for lightweight, high-performance Key-Value (KV) store. Solid State Disks (SSDs) provide acceleration of KV operations on LSM trees. However, this hierarchical design involves multiple software layers, including the LSM tree, host file system, and Flash Translation Layer (FTL), causing cascading write amplifications. We propose KVSSD, a close integration of LSM trees and the FTL, to manage write amplifications from different layers. KVSSD exploits the FTL mapping mechanism to implement copy-free compaction of LSM trees, and it enables direct data allocation in flash memory for efficient garbage collection. In our experiments, compared to the hierarchical design, our KVSSD reduced the write amplification by 88% and improved the throughput by 347%. Sung-Ming Wu, Kai-Hsiang Lin, Li-Pin Chang |
DATE | 1 |
| 2011 | A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading ChannelsabstractIn this paper, we propose a "two-level" frequency-hopping code-division multiple-access (FH-CDMA) scheme for wireless communication systems. The new scheme provides flexibility in the selection of modulation codes and FH patterns. By partitioning the modulation codes, our two-level scheme can be modified to support more possible users without increasing the number of FH patterns. The performance and spectral efficiency (SE) of the scheme are analyzed. Our results show that the partitioned two-level FH-CDMA scheme supports higher data rate and greater SE than Goodman's frequency-shift-keying FH-CDMA scheme under some conditions. Sung-Ming Wu, Guu-chang Yang, Cheng-Yuan Chang, Wing C. Kwong |
IEEE Trans. Commun. | 1 |
| 2010 | Two-Level FH-CDMA Wireless Communication Systems Using Quadratic Congruence CodesabstractIn this paper, a two-level frequency-hopping code-division multiple-access (FH-CDMA) scheme, which is flexible in the selection of modulation codes and FH patterns, is studied. This two-level FH-CDMA scheme can be modified by the partition of the modulation codes in order to support more subscribers without increasing the number of FH patterns. The performance and spectral efficiency (SE) analyses show that our scheme supports higher data rate and SE than Goodman's frequency-shift-keying FH-CDMA scheme, making the former more attractive for wireless communication systems. Kun-Ling Chiang, Sung-Ming Wu, Hung-Wei Chen, Guu-chang Yang, Cheng-Yuan Chang, Wing C. Kwong |
VTC Spring | 2 |