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Boqian Wang

dblp:241/1173 · DBLP profile ↗
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5ranked-venue papers
4as first author
2since 2021 · last 2025
0000-0003-2791-2395ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 4 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Interconnection networks and networks-on-chip · 22% Cloud and datacenter computing · 20% Electronic design automation · 16%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing
quality of service
0.612022
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Parallel and multicore computing
contention reduction
0.412020
Advance Virtual Channel Reservation · IEEE Trans. Computers 2020
Electronic design automation › physical design
routing
0.412020
Advance Virtual Channel Reservation · IEEE Trans. Computers 2020
Interconnection networks and networks-on-chip › routing algorithms
wormhole routing
0.412020
Advance Virtual Channel Reservation · IEEE Trans. Computers 2020
Embedded and real-time systems › real-time scheduling
admission control
0.412019
ANN Based Admission Control for On-Chip Networks · DAC 2019
Interconnection networks and networks-on-chip
network interface
0.212022
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Performance modeling and evaluation › simulation › architectural simulation
full-system simulation
0.112020
Advance Virtual Channel Reservation · IEEE Trans. Computers 2020
Performance modeling and evaluation
simulation
0.112020
Advance Virtual Channel Reservation · IEEE Trans. Computers 2020
Performance modeling and evaluation › performance prediction
network performance prediction
0.112019
ANN Based Admission Control for On-Chip Networks · DAC 2019

Methods — techniques the papers use, named apart from their topics

virtual channels · 0.6traffic converter · 0.6time-division multiplexing · 0.6wormhole router · 0.4virtual channel reservation · 0.4priority service · 0.4data preprocessing · 0.4artificial neural network · 0.4
YearPublicationVenuePosition
2025 A Novel Fourier Adjacency Transformer for Advanced EEG Emotion Recognition
Jinfeng Wang 0008, Yanhao Huang, Sifan Song, Boqian Wang, Jionglong Su, Jiaman Ding
MICCAI (12)4
2022 Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
abstract
We propose a network-on-chip (NoC)-based whole system design, whose communication architecture is compatible with the advanced microcontroller bus architecture advanced extensible interface 4 (AXI4) protocol and supports high-performance multiple quality-of-service (QoS) schemes. In our system, the network interface (NI) between the NoC and the master/slave node is proposed to make the NoC architecture independent from the AXI4 protocol via message format conversion between the AXI4 signal format and the packet format, offering high flexibility to the NoC design. Besides, a QoS inheritance mechanism is applied in the slave-side NI to support QoS during packets’ round-trip transfer in the NoC. The NoC system contains time-division multiplexing (TDM) and virtual channel (VC) subnetworks to apply multiple QoS schemes to AXI4 signals with different QoS tags, and the NI is responsible for signals distribution between two subnetworks. Besides, a traffic converter is proposed in each NI to balance the traffic between the two subnetworks when necessary. The experimental results show that our proposed architecture ensures a high-throughput and low-latency NoC system. By applying the traffic converter, the packet latency can be improved.
Boqian Wang, Zhonghai Lu
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2020 Advance Virtual Channel Reservation
abstract
We present a smart communication service called Advance Virtual Channel Reservation (AVCR) to provide a highway to target packets, which can greatly reduce their contention delay in NoC. AVCR takes advantage of the fact that we can know or predict the destination of some packets ahead of their arrival at the network interface (NI). Exploiting the time interval before a packet is ready, AVCR establishes an end-to-end highway from the source NI to the destination NI. This highway is built up by reserving the virtual channel (VC) resources ahead of the target packet transmission and offering priority service to flits in the reserved VC in the wormhole router, which can avoid the target packets' VC allocation and switch arbitration delay. Additionally, optimization schemes are proposed to increase resources utilization and system performance. We evaluate AVCR with GEM5 full-system simulations by using 24 benchmarks in PARSEC and OMP2012. Compared to the state-of-art mechanisms and the priority-based mechanism, experimental results show that our mechanism can significantly reduce the target packets' transfer latency and thus effectively decrease the average region-of-interest (ROI) time by 18.1 percent (maximally by 29.4 percent) across all benchmarks.
Boqian Wang, Zhonghai Lu
IEEE Trans. Computers1
2019 ANN Based Admission Control for On-Chip Networks
abstract
We propose an admission control method in Network-on-Chip (NoC) with a centralized Artificial Neural Network (ANN) admission controller, which can improve system performance by predicting the most appropriate injection rate of each node via the network performance information. In the online control process, a data preprocessing unit is applied to simplify the ANN architecture and make the prediction results more accurate. Based on the preprocessed information, the ANN predictor determines the control strategy and broadcasts it to each node where the admission control will be applied. Compared to the previous work, our method builds up a high-fidelity model between the network status and the injection rate regulation. The full-system simulation results show that our proposed method can enhance application performance by 17.8% on average and up to 23.8%.
Boqian Wang, Zhonghai Lu, Shenggang Chen
DAC1
2019 Advance Virtual Channel Reservation
abstract
We present a smart communication service called Advance Virtual Channel Reservation (AVCR) to provide a highway to packets, which can greatly reduce their contention delay in NoC. AVCR takes advantage of the fact that we can know or predict the destination of some packets ahead at the network interface (NI). Exploiting the time slack before a packet is ready, AVCR establishes an end-to-end highway from the source NI to the destination NI. This highway is built up by reserving virtual channel (VC) resources ahead and at the same time, offering priority service to those VCs in the router, which can therefore avoid highway packets' VC allocation and switch arbitration delay in NoC. Additionally, optimization schemes are developed to reduce VC overhead and increase highway utilization. We evaluate AVCR with cycle-accurate full-system simulations in GEM5 by using all benchmarks in PARSEC. Compared to the state-of-art mechanisms and the priority based mechanism, experimental results show that our mechanism can significantly reduce the target packets' transfer latency and effectively decrease the average region-of-interest (ROI) time by 22.4% (maximally by 29.4%) across PARSEC benchmarks.
Boqian Wang, Zhonghai Lu
DATE1