In this paper, a bidirectional RF front-end based on the WIN Semiconductor’s 100 nm GaAs pHEMT process that can support the extension of E-band vector network analyzers (VNA) is proposed. For E-band VNA extensions, an amplifier multiplier chain (AMC) with high output power and high harmonic rejection characteristics is required to effectively drive the following bidirectional passive mixer. In this design, the AMC includes a 20–30 GHz frequency doubler, an E-band frequency tripler, and an E-band balanced power amplifier. The frequency doubler features a push-push architecture to effectively improve the rejection characteristics of odd harmonics. Following this stage is a frequency tripler based on an antiparallel diode pair (APDP) topology, which includes a pair of power enhancement T-lines to improve the output power of the AMC. The output of the AMC is a balanced power amplifier with source degeneration inductors to enhance the amplifier’s bandwidth and stability. To further expand the bandwidth of the AMC, driver amplifiers with an integrated RC negative feedback network are included. Additionally, a compact matching network with bandpass characteristics is integrated between the doubler and tripler to enhance harmonic rejection performance. Measurement results indicate that the peak output power of the E-band AMC is 20.9 dBm, and the harmonics rejection is better than 25 dBc. The intermediate frequency bandwidth of the bidirectional RF front-end covers 100 MHz–8 GHz, and the corresponding up-conversion gain and down-conversion gain are better than -8.2dB and -8 dB, respectively.

This paper proposes a 24-29.5 GHz$2\times 2$transmitter (TX) and receiver (RX) front-end chipset with streamlined intermediate frequency (IF) interfaces for digital beamforming (DBF) systems. An ultra-compact 90° coupler employing a three-dimensional (3-D) coupling structure achieves a 70% reduction in size compared to typical Lange couplers while maintaining excellent performance. This 3-D 90° coupler enables the synthesis/distribution of IF I-Q signals within the transceiver (TRX), enhancing the feasibility of mmWave DBF by reducing the demand for baseband channels and facilitating scalability for multi-beam arrays. To ensure a low-level error vector magnitude (EVM) in the TRX, the chipset employs joint package design for optimal power and noise performance. It utilizes an image-reject mixer to suppress RX image noise and introduces a DC-offset in the single-sideband up-converter for LO leakage regulation. Additionally, a frequency doubler chain is incorporated to enhance phase noise performance. Fabricated using 0.13-$\mu $m SiGe BiCMOS technology and packaged in WLCSP process, the TX achieves an average output 1-dB compression point ($OP_{1dB}$) of 20 dBm per channel. The RX chip features a minimum noise figure (NF) of 3.4 dB. Over-the-air (OTA) measurements conducted over a 1.1-m distance reveal a transmission data rate of up to 8 Gb/s using 16-QAM modulation at 25 GHz. Furthermore, when employing a 400-MHz 64-QAM 5G New Radio (NR) modulation, the system maintains EVM levels below -33 dB at 25 GHz and below -30 dB over 24-29.5 GHz.

This article presents a fully packaged 94-GHz 16-channel local oscillator (LO) phase-shifting transmitter (TX) and a single-channel receiver (RX). The implementation is accomplished using a hybrid integration scheme, combining high-output-power 100 nm GaAs pHEMT front-end chips and highly-integrated 130 nm SiGe BiCMOS beamformer chips. High-accuracy LO phase shifting is achieved with the utilization of a commercial SiGe-based four-channel beamformer chips, offering 7-bit phase control at 24–28 GHz. A 26-to-78 GHz tripler chain using power-enhancing and harmonic-suppression techniques, a 16-to-94 GHz bi-directional mixer, and a 94-GHz power amplifier are designed in the transmitter front-end chip based on the GaAs process. The GaAs transmitter front-ends are wire-bonded to microstrip lines and then converted to low-loss substrate integrated waveguides (SIWs), which directly feed a high-gain TEM horn antenna array. The inter-element spacing of the transmitter array is optimized to 1.6 mm ($0.5 \lambda _{0}$@94 GHz) for a wide scanning range. The 16-channel transmitter achieves a wide scanning range of ±50° and a peak effective isotropic radiated power (EIRP) of 43.6 dBm at 94 GHz. The GaAs receiver chip is packaged with the WR10 waveguide RF interface and connected to a horn antenna. The packaged GaAs receiver module achieves a conversion gain (CG) of 25 dB and a noise figure (NF) of 5.8 dB. Additionally, the 16T1R over-the-air (OTA) measurement supports 5G New Radio 400-MHz 64-QAM signal between 88 and 94 GHz over a 5-meter ±48° scanning range.

This paper presents a monolithically integrated E-band amplifier multiplier chain (AMC) developed in 130 nm SiGe BiCMOS process. This E-band AMC is composed of a 25 GHz 1:1 power divider, two 25 GHz driver amplifiers (DA1,2), a 75 GHz passive frequency tripler, and a 75 GHz power amplifier (PA). By applying a bypass tuning capacitor based power enhancing technique in the single-ended DA and PA, the output power and power-added-efficiency (PAE) of the AMC have been effectively improved. Benefiting from the proposed passive tripler core with second harmonic suppression function, and the impedance matching network with frequency selection characteristics, the AMC presents better harmonic suppression performance compared with the conventional topology. The bias circuits with temperature compensation are applied to the DA and PA to ensure the performance of the AMC when the temperature changes. The AMC has a measured output power exceeding 0 dBm in the entire E-band frequency range with a peak output power of 10.9 dBm at 77 GHz, and exhibits a record PAE of 8.25 %. Within the 3 dB operating frequency range from 69 to 87 GHz, the rejection of fundamental and second harmonics are better than 33.5 dB. The AMC can work properly between −40°C and 125 °C with the proposed temperature compensation bias circuits.