Hyunjong Choi

dblp:243/6496 · DBLP profile ↗
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11ranked-venue papers
4as first author
8since 2021 · last 2025
0000-0001-8253-7028ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 3 first-author · 3 since 2021Applied, interdisciplinary, general and emerging computing · 3 · 3 since 2021Computer networks · 2 · 1 first-author · 2 since 2021
YearPublicationVenuePosition
2025 Work-in-Progress: A Practical Linux Framework for Weakly-Hard Tasks with Constant Bandwidth Server
abstract
Weakly-hard real-time systems enhance resource efficiency by allowing bounded deadline misses, but practical support in existing platforms remains limited. In this work-in-progress, we present the CBS-based Weakly-Hard Framework, which maps tasks with$(m, K)$constraints into Constant Bandwidth Server (CBS) parameters under the SCHED_DEADLINE policy in Linux. The proposed approach requires no kernel modifications and guarantees schedulability through constrained-deadline EDF analysis. We implemented the framework as a user-space API and evaluated it on a Raspberry Pi platform. Experimental results show improved schedulability compared to existing methods and demonstrate potential opportunities for Quality-of-Service (QoS) enhancement.
Marcus Chen, Pascal Reich, Hyunjong Choi
RTSS4
2025 Work-In-Progress: Modeling and Analysis of Inference Latency on Usb Edge Tpus
abstract
The USB-connected Edge TPU is widely adopted for edge inference, yet its performance characteristics remain poorly understood in real-world settings. Its inference latency is shaped not only by compute but also by parameter streaming over a constrained and potentially contended I/O channel. Prior work has largely relied on profiling with modified SRAM capacities, which provides only isolated insights and fails to capture runtime behavior when weights exceed on-chip memory or when multiple devices contend for USB bandwidth. In this paper, we present a streaming-aware latency model for the USB Edge TPU. In evaluation, we validate the model using several practical DNNs. Experimental results show that the predicted upper and lower bounds can effectively bound the measured latencies. Our work offers a foundation for future work on a predictive framework that generalizes to multi-device environments that require real-time guarantees, for which USB contention introduces nondeterminism.
Haopeng Gao, Hyunjong Choi
RTSS2
2024 PAAM: A Framework for Coordinated and Priority-Driven Accelerator Management in ROS 2
abstract
This paper proposes a Priority-driven Accelerator Access Management (PAAM) framework for multi-process robotic applications built on top of the Robot Operating System (ROS) 2 middleware platform. The framework addresses the issue of predictable execution of time- and safety-critical callback chains that require hardware accelerators such as GPUs and TPUs. PAAM provides a standalone ROS executor that acts as an accelerator resource server, arbitrating accelerator access requests from all other callbacks at the application layer. This approach enables coordinated and priority-driven accelerator access management in multi-process robotic systems. The framework design is directly applicable to all types of accelerators and enables granular control over how specific chains access accelerators, making it possible to achieve predictable real-time support for accelerators used by safety-critical callback chains without making changes to underlying accelerator device drivers. The paper shows that PAAM also offers a theoretical analysis that can upper bound the worst-case response time of safety-critical callback chains that necessitate accelerator access. This paper also demonstrates that complex robotic systems with extensive accelerator usage that are integrated with PAAM may achieve up to a 91% reduction in end-to-end response time of their critical callback chains.
Daniel Enright, Yecheng Xiang, Hyunjong Choi, Hyoseung Kim 0001
RTAS3
2023 Timing Analysis and Priority-driven Enhancements of ROS 2 Multi-threaded Executors
abstract
The second generation of Robotic Operating System, ROS 2, has gained much attention for its potential to be used for safety-critical robotic applications. The need to provide a solid foundation for timing correctness and scheduling mechanisms is therefore growing rapidly. Although there are some pioneering studies conducted on formally analyzing the response time of processing chains in ROS 2, the focus has been limited to singlethreaded executors, and multi-threaded executors, despite their advantages, have not been studied well. To fill this knowledge gap, in this paper, we propose a comprehensive response-time analysis framework for chains running on ROS 2 multi-threaded executors. We first analyze the timing behavior of the default scheduling scheme in ROS 2 multi-threaded executors, and then present priority-driven scheduling enhancements to address the limitations of the default scheme. Our framework can analyze chains with both arbitrary and constrained deadlines and also the effect of mutually-exclusive callback groups. Evaluation is conducted by a case study on NVIDIA Jetson AGX Xavier and schedulability experiments using randomly-generated chains. The results demonstrate that our analysis framework can safely upper-bound response times under various conditions and the priority-driven scheduling enhancements not only reduce the response time of critical chains but also improve analytical bounds.
Hoora Sobhani, Hyunjong Choi, Hyoseung Kim 0001
RTAS2
2021 PiCAS: New Design of Priority-Driven Chain-Aware Scheduling for ROS2
abstract
In ROS (Robot Operating System), most applications in time- and safety-critical domain are constructed in the form of callback chains with data dependencies. Due to the shortcomings in its real-time support, ROS does not provide a strong timing guarantee and may lead to disastrous results. Although ROS2 claims to enhance the real-time capability, ensuring predictable end-to-end chain latency still remains a challenging problem. In this paper, we propose a new priority-driven chain-aware scheduler for the ROS2 framework and present end-to-end latency analysis for the proposed scheduler. With our scheduler, callbacks are prioritized based on the given timing requirements of the corresponding chains so that the end-to-end latency of critical chains can be improved with a predictable bound. The proposed scheduling design includes priority assignment and resource allocation considering all ROS2 scheduling-related abstractions, e.g., callbacks, nodes, and executors. To the best of our knowledge, this is the first work to address the inherent limitations of ROS2 in end-to-end latency by proposing a new scheduler design. We have implemented our scheduler in ROS2 running on NVIDIA Xavier NX. We have conducted case studies and schedulability experiments. The results show that the proposed scheduler yields a substantial improvement in end-to-end latency over the default ROS2 scheduler and the latest work in real-world scenarios.
Hyunjong Choi, Yecheng Xiang, Hyoseung Kim 0001
RTAS1
2021 AegisDNN: Dependable and Timely Execution of DNN Tasks with SGX
abstract
With the rising demand for emerging DNN applications in safety-critical systems, much attention has been given to the reliability and trustworthiness of DNN inference output against malicious attacks. Although prior work has been conducted to improve the privacy of DNN inference by executing the entire DNN model inside Intel SGX enclaves, existing approaches pose severe performance challenges to achieve dependable and timely execution simultaneously. In this paper, we propose AegisDNN, a DNN inference framework to address this problem. AegisDNN leverages secure SGX enclaves for protecting only the critical part of real-time DNN tasks which are vulnerable to potential fault injection attacks. To choose the right set of layers for protection while ensuring the timeliness of task execution, AegisDNN includes a dynamic-programming based algorithm that finds a layer protection configuration for each task to meet the real-time and dependability requirements based on the layer-wise DNN time and SDC (Silent Data Corruption) profiling mechanism. AegisDNN also utilizes a machine-learning based SDC prediction method to significantly reduce the time for estimating SDC rates for all possible layer protection configurations. We implemented AegisDNN on Caffe, PyTorch, and Tensorflow with Eigen BLAS ported into SGX enclaves to comprehensively demonstrate the effectiveness of AegisDNN against state-of-the-art DNN fault-injection attacks. Experiment results indicate that AegisDNN could satisfy both dependability and real-time requirements simultaneously, when none of the other compared approaches could do so.
Yecheng Xiang, Yidi Wang 0001, Hyunjong Choi, Hyoseung Kim 0001
RTSS3
2021 Toward Practical Weakly Hard Real-Time Systems: A Job-Class-Level Scheduling Approach
abstract
Recent applications of the Internet of Things and cyber-physical systems require the integration of many sensing and control tasks into resource-constrained embedded devices. Such tasks can often tolerate a bounded number of timing violations. The concept of weakly hard real-time systems can effectively improve resource efficiency without sacrificing system safety. However, the existing studies have limitations on their practical use due to the restrictions imposed on the task timing behavior, high analysis complexity, and the lack of multicore support. In this article, we propose a new job-class-level fixed-priority preemptive scheduler and its schedulability analysis framework for weakly hard real-time tasks. Our proposed scheduler employs the meet-oriented classification of jobs of a task in order to reduce the worst-case temporal interference imposed on other tasks. Under this approach, each job is associated with a “job-class” that is determined by the number of deadlines previously met (with a bounded number of consecutively missed deadlines). This approach allows decomposing the complex weakly hard schedulability problem into two subproblems that are easier to solve: 1) analyzing the response time of a job with each job-class, which can be done by an extension of the existing task-level analysis and 2) finding possible job-class patterns, which can be modeled as a simple reachability tree. We also present a semipartitioned task allocation method for multicore platforms, which enhances the schedulability of weakly hard tasks under the proposed scheduling framework. Experimental results indicate that our scheduler outperforms the prior work in terms of task schedulability and analysis time complexity. We have also implemented a prototype of a job-class-level scheduler in the Linux kernel running on Raspberry Pi with acceptably small-runtime overhead.
Hyunjong Choi, Hyoseung Kim 0001, Qi Zhu 0002
IEEE Internet Things J.1
2021 Real-Time Task Scheduling on Intermittently Powered Batteryless Devices
abstract
Intermittently powered devices (IPDs) have gained much interest in recent years. However, scheduling real-time tasks while supporting data consistency, timekeeping, and schedulability guarantees on these devices still remains a challenge. Many sensing tasks need long indivisible sensor reading operations, but most prior work has limited their focus to the forward progress of computation-only tasks. In this article, we propose a scheduling framework to execute real-time periodic tasks with atomic sensing operations. Our proposed method keeps track of time progress and ensures the periodic execution of sensing tasks while efficiently utilizing intermittent power sources. We provide schedulability analysis to determine if a taskset is schedulable under a given charging condition. As a proof-of-concept, we design a custom programmable RFID tag device, called R'tag, and demonstrate the effectiveness of our framework in a realistic sensing application. Evaluation results show that the proposed method satisfies the real-time task execution requirements on IPDs in terms of task scheduling, timekeeping, and periodic sensing while significantly outperforming prior work.
Hyunjong Choi, Yidi Wang 0001, Yecheng Xiang, Hyoseung Kim 0001
IEEE Internet Things J.2
2020 Know the Unknowns: Addressing Disturbances and Uncertainties in Autonomous Systems : Invited Paper
abstract
Future autonomous systems will employ complex sensing, computation, and communication components for their perception, planning, control, and coordination, and could operate in highly dynamic and uncertain environment with safety and security assurance. To realize this vision, we have to better understand and address the challenges from the "unknowns" - the unexpected disturbances from component faults, environmental interference, and malicious attacks, as well as the inherent uncertainties in system inputs, model inaccuracies, and machine learning techniques (particularly those based on neural networks). In this work, we will discuss these challenges, propose our approaches in addressing them, and present some of the initial results. In particular, we will introduce a cross-layer framework for modeling and mitigating execution uncertainties (e.g., timing violations, soft errors) with weakly-hard paradigm, quantitative and formal methods for ensuring safe and time-predictable application of neural networks in both perception and decision making, and safety-assured adaptation strategies in dynamic environment.
Qi Zhu 0002, Wenchao Li 0001, Hyoseung Kim 0001, Yecheng Xiang, Kacper Wardega, Zhilu Wang, Yixuan Wang 0001, Hengyi Liang, Chao Huang 0015, Jiameng Fan, Hyunjong Choi
ICCAD11
2020 Chain-Based Fixed-Priority Scheduling of Loosely-Dependent Tasks
abstract
Many cyber-physical applications consist of chains of tasks. Such tasks are often loosely dependent, meaning task execution is time-triggered and independent of the update rate of input data. Since meaningful output can be obtained after processing all the intermediate tasks of a chain, the end-to-end latency of the chain is an important metric that can affect the correctness and quality of the system. In this paper, we present a chain-based fixed-priority preemptive scheduler for multicore real-time systems. The scheduler identifies effective chain instances contributing to the generation of updated output, and employs a runtime policy to improve the end-to-end latency of chains. Based on our scheduler, an analysis method is proposed with two parts: (i) bounding the start and finish time of each job, and (ii) analyzing the end-to-end latency of effective chain instances. Experimental results show that our chain-based scheduler achieves up to 83% reduction in end-to-end latency compared to the state-of-the-art and yields a significant benefit in inter-chain distance over chain-unaware schedulers. Furthermore, our analysis method can be easily adapted to chain-unaware schedulers and provides tighter bounds than prior work.
Hyunjong Choi, Hyoseung Kim 0001
ICCD1
2019 Job-Class-Level Fixed Priority Scheduling of Weakly-Hard Real-Time Systems
abstract
Many cyber-physical applications including sensing and control operations can tolerate a certain degree of timing violations as long as the number of the violations are predictably bounded. The notion of weakly-hard real-time systems has been studied to capture this effect, but existing work reveals limitations for practical use due the restrictions imposed on timing model and the high complexity of analysis. In this paper, we propose a new job-class-level fixed-priority preemptive scheduler and its schedulability analysis framework for sporadic tasks with weakly-hard real-time constraints. Our proposed scheduler employs the meet-oriented classification of jobs of a task in order to reduce the worst-case temporal interference imposed on other tasks. Under this approach, each job is associated with a "job-class" that is determined by the number of deadlines previously met (with a bounded number of consecutively-missed deadlines). This approach also allows decomposing the complex weakly-hard schedulability problem into two sub-problems that are easier to solve: (1) analyzing the response time of a job with each job-class, which can be done by an extension of the existing task-level analysis, and (2) finding possible job-class patterns, which can be modeled as a simple reachability tree. Experimental results indicate that our scheduler outperforms prior work in terms of task schedulability and analysis time complexity. We have also implemented a prototype of a job-class-level scheduler in the Linux kernel running on Raspberry Pi with acceptably-small runtime overhead.
Hyunjong Choi, Hyoseung Kim 0001, Qi Zhu 0002
RTAS1