Gyusun Lee

dblp:244/9237 · DBLP profile ↗
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5ranked-venue papers
4as first author
3since 2021 · last 2025
0000-0002-6935-1648ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 4 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 first-authorDatabases, data management, data science and information retrieval · 1 · 1 since 2021
YearPublicationVenuePosition
2025 A Scalable and Overflow-Tolerant Mechanism for Minimum Virtual Time Tracking
abstract
In computer systems, fair-share scheduling of resources is essential, and virtual time-based algorithms are widely adopted for their work-conserving nature. These algorithms rely on tracking the minimum virtual time, as they always schedule the entity with the smallest value to ensure fairness. Maintaining this minimum efficiently is crucial for scalable performance, particularly in multi-core systems where contention can be high. Mindicator, a scalable and low-overhead data structure, is wellsuited for tracking minimum values and is a natural candidate for monitoring minimum virtual time. However, its use in virtual time management is limited because virtual time grows monotonically and can exceed the 32-bit integer range supported by Mindicator. This leads to incorrect minimum tracking when values overflow, potentially causing fairness violations and even malfunctioning behavior. To overcome these limitations, this paper proposes TMindicator (Twin-Mindicator), a scalable approach to virtual time tracking that tolerates integer overflow and supports values with arbitrary bit widths. T-Mindicator uses two Mindicator instances, each managing a 32-bit value, while independently tracking the number of even and odd overflow events. By concatenating the overflow counters with the 32-bit minimum values from each instance, T-Mindicator effectively extends support to 64-bit and larger virtual time representations. Our evaluation demonstrates that T-Mindicator preserves fairness among competing entities and ensures stable workload execution without anomalies when integrated into a state-of-the-art fair I/O scheduler.
Gyusun Lee, Seungwoo Jin, Jiwon Woo, Jinkyu Jeong
ICCD1
2022 Efficient hybrid polling for ultra-low latency storage devices
Gyusun Lee, Seokha Shin, Jinkyu Jeong
J. Syst. Archit.1
2021 D2FQ: Device-Direct Fair Queueing for NVMe SSDs
Jiwon Woo, Minwoo Ahn, Gyusun Lee, Jinkyu Jeong
FAST3
2020 A Case for Hardware-Based Demand Paging
abstract
The virtual memory system is pervasive in today's computer systems, and demand paging is the key enabling mechanism for it. At a page miss, the CPU raises an exception, and the page fault handler is responsible for fetching the requested page from the disk. The OS typically performs a context switch to run other threads as traditional disk access is slow. However, with the widespread adoption of high-performance storage devices, such as low-latency solid-state drives (SSDs), the traditional OS-based demand paging is no longer effective because a considerable portion of the demand paging latency is now spent inside the OS kernel. Thus, this paper makes a case for hardware-based demand paging that mostly eliminates OS involvement in page miss handling to provide a near-disk-access-time latency for demand paging. To this end, two architectural extensions are proposed: LBA-augmented page table that moves I/O stack operations to the control plane and Storage Management Unit that enables CPU to directly issue I/O commands without OS intervention in most cases. OS support is also proposed to detach tasks for memory resource management from the critical path. The evaluation results using both a cycle-level simulator and a real x86 machine with an ultra-low latency SSD show that the proposed scheme reduces the demand paging latency by 37.0%, and hence improves the performance of FIO read random benchmark by up to 57.1% and a NoSQL server by up to 27.3% with real-world workloads. As a side effect of eliminating OS intervention, the IPC of the user-level code is also increased by up to 7.0%.
Gyusun Lee, Wenjing Jin 0001, Wonsuk Song, Jeonghun Gong, Jonghyun Bae, Tae Jun Ham, Jae W. Lee, Jinkyu Jeong
ISCA1
2019 Asynchronous I/O Stack: A Low-latency Kernel I/O Stack for Ultra-Low Latency SSDs
Gyusun Lee, Seokha Shin, Wonsuk Song, Tae Jun Ham, Jae W. Lee, Jinkyu Jeong
USENIX ATC1