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Frederik Schmitt

dblp:245/0350 · DBLP profile ↗
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6ranked-venue papers
1as first author
6since 2021 · last 2024
0009-0001-7106-3725ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 4 · 1 first-author · 4 since 2021Software engineering, systems software and programming languages · 2 · 2 since 2021Theory of computation · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
3 papers
Requirements engineering and software design · 52% Program synthesis and code generation · 30% Program verification · 17%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%
Theoretical computer science
2 papers
Automated reasoning and model checking · 79% Logic in computer science · 21%
Artificial intelligence
2 papers
Knowledge representation and reasoning · 69% Deep learning architectures and training · 31%

Topics — the 11 heaviest of 12, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Requirements engineering and software design
formal specification
1.322023
Iterative Circuit Repair Against Formal Specifications · ICLR 2023
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models · CAV (2) 2023
Automated reasoning and model checking
satisfiability
0.812024
Learning Better Representations From Less Data For Propositional Satisfiability · NeurIPS 2024
Program synthesis and code generation
code generation with language models
0.712023
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models · CAV (2) 2023
Requirements engineering and software design › formal specification
natural language to LTL translation
0.712023
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models · CAV (2) 2023
Program verification › temporal logic
temporal logic specification
0.712023
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models · CAV (2) 2023
Electronic design automation › hardware verification and test
hardware verification
0.712023
Iterative Circuit Repair Against Formal Specifications · ICLR 2023
Knowledge, reasoning and agents › Knowledge representation and reasoning › logic in computer science › logical foundations › non-classical logics › temporal logic
temporal logic reasoning
0.512021
Teaching Temporal Logics to Neural Networks · ICLR 2021
Electronic design automation
logic synthesis
0.512021
Neural Circuit Synthesis from Specification Patterns · NeurIPS 2021
Electronic design automation › logic synthesis
sequential circuit synthesis
0.512021
Neural Circuit Synthesis from Specification Patterns · NeurIPS 2021
Machine learning › Deep learning architectures and training › attention mechanism
attention network
0.212024
Learning Better Representations From Less Data For Propositional Satisfiability · NeurIPS 2024
Logic in computer science
formal specification
0.212023
nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models · CAV (2) 2023

Methods — techniques the papers use, named apart from their topics

propositional resolution · 1.5neuro-symbolic learning · 1.5expert iteration · 1.5attention mechanism · 1.5user study · 1.3large language model · 1.3synthetic data generation · 1.0specification pattern mining · 1.0hierarchical transformer · 1.0neural network · 0.5
YearPublicationVenuePosition
2024 Learning Better Representations From Less Data For Propositional Satisfiability
abstract
Training neural networks on NP-complete problems typically demands very large amounts of training data and often needs to be coupled with computationally expensive symbolic verifiers to ensure output correctness. In this paper, we present NeuRes, a neuro-symbolic approach to address both challenges for propositional satisfiability, being the quintessential NP-complete problem. By combining certificate-driven training and expert iteration, our model learns better representations than models trained for classification only, with a much higher data efficiency -- requiring orders of magnitude less training data. NeuRes employs propositional resolution as a proof system to generate proofs of unsatisfiability and to accelerate the process of finding satisfying truth assignments, exploring both possibilities in parallel. To realize this, we propose an attention-based architecture that autoregressively selects pairs of clauses from a dynamic formula embedding to derive new clauses. Furthermore, we employ expert iteration whereby model-generated proofs progressively replace longer teacher proofs as the new ground truth. This enables our model to reduce a dataset of proofs generated by an advanced solver by $\sim$$32$% after training on it with no extra guidance. This shows that NeuRes is not limited by the optimality of the teacher algorithm owing to its self-improving workflow. We show that our model achieves far better performance than NeuroSAT in terms of both correctly classified and proven instances.
Mohamed Ghanem, Frederik Schmitt, Julian Siber, Bernd Finkbeiner
NeurIPS2
2024 NeuroSynt: A Neuro-symbolic Portfolio Solver for Reactive Synthesis
abstract
Abstract We introduce , a neuro-symbolic portfolio solver framework for reactive synthesis. At the core of the solver lies a seamless integration of neural and symbolic approaches to solving the reactive synthesis problem. To ensure soundness, the neural engine is coupled with model checkers verifying the predictions of the underlying neural models. The open-source implementation of provides an integration framework for reactive synthesis in which new neural and state-of-the-art symbolic approaches can be seamlessly integrated. Extensive experiments demonstrate its efficacy in handling challenging specifications, enhancing the state-of-the-art reactive synthesis solvers, with contributing novel solves in the current SYNTCOMP benchmarks.
Matthias Cosler, Christopher Hahn, Ayham Omar, Frederik Schmitt
TACAS (3)4
2023 nl2spec: Interactively Translating Unstructured Natural Language to Temporal Logics with Large Language Models
abstract
Abstract A rigorous formalization of desired system requirements is indispensable when performing any verification task. This often limits the application of verification techniques, as writing formal specifications is an error-prone and time-consuming manual task. To facilitate this, we present , a framework for applying Large Language Models (LLMs) to derive formal specifications (in temporal logics) from unstructured natural language. In particular, we introduce a new methodology to detect and resolve the inherent ambiguity of system requirements in natural language: we utilize LLMs to map subformulas of the formalization back to the corresponding natural language fragments of the input. Users iteratively add, delete, and edit these sub-translations to amend erroneous formalizations, which is easier than manually redrafting the entire formalization. The framework is agnostic to specific application domains and can be extended to similar specification languages and new neural models. We perform a user study to obtain a challenging dataset, which we use to run experiments on the quality of translations. We provide an open-source implementation, including a web-based frontend.
Matthias Cosler, Christopher Hahn, Daniel Mendoza, Frederik Schmitt, Caroline Trippel
CAV (2)4
2023 Iterative Circuit Repair Against Formal Specifications
Matthias Cosler, Frederik Schmitt, Christopher Hahn, Bernd Finkbeiner
ICLR2
2021 Teaching Temporal Logics to Neural Networks
Christopher Hahn, Frederik Schmitt, Jens U. Kreber, Markus N. Rabe, Bernd Finkbeiner
ICLR2
2021 Neural Circuit Synthesis from Specification Patterns
abstract
We train hierarchical Transformers on the task of synthesizing hardware circuits directly out of high-level logical specifications in linear-time temporal logic (LTL). The LTL synthesis problem is a well-known algorithmic challenge with a long history and an annual competition is organized to track the improvement of algorithms and tooling over time. New approaches using machine learning might open a lot of possibilities in this area, but suffer from the lack of sufficient amounts of training data. In this paper, we consider a method to generate large amounts of additional training data, i.e., pairs of specifications and circuits implementing them. We ensure that this synthetic data is sufficiently close to human-written specifications by mining common patterns from the specifications used in the synthesis competitions. We show that hierarchical Transformers trained on this synthetic data solve a significant portion of problems from the synthesis competitions, and even out-of-distribution examples from a recent case study.
Frederik Schmitt, Christopher Hahn, Markus N. Rabe, Bernd Finkbeiner
NeurIPS1