EDBT 2026 Demo / reviewers in the wild / expert
Saranya Karunamurthi
dblp:245/7758
· DBLP profile ↗
4ranked-venue papers
0as first author
4since 2021 · last 2026
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | ASIC design of trimmed weighted mean filter for image processing applications: An analog implementation
K. N. Vijeyakumar, P. Vanjipriya, Saranya Karunamurthi, Rahul Suresh Shanmugasundharam |
Integr. | 3 |
| 2025 | Design and analysis of faithful parallel mean filter using approximate adders and 4:2 compressors for low-power VLSI architectures
K. N. Vijeyakumar, Talluri Vineel Jessy, Saranya Karunamurthi, B. Naresh Kumar Reddy |
Integr. | 3 |
| 2025 | Area-efficient low-power image watermarking architecture using faithful approximation and reversible logic
Silambarasan D., Vijeyakumar Krishnasamy Natarajan, Saranya Karunamurthi |
Multim. Tools Appl. | 3 |
| 2022 | A New Approximate 4-2 Compressor using Merged Sum and Carry
Chinthalgiri Jyothi, Saranya Karunamurthi, Bhaskara Rao Jammu 0001, Sreehari Veeramachaneni, Sk. Noor Mahammad |
J. Electron. Test. | 2 |