In this paper we propose an automatic controller design methodology for DC-DC converters that comprehensively addresses both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). This methodology leverages on Artificial Intelligence (AI) techniques. Specifically, we resort on the Genetic Algorithms (GA) and Particle Swarm Optimization (PSO) methods. Both GA and PSO permit to optimally tune the component values employed in the compensation network, overcoming the limitations of traditional design methods. The latter focus indeed solely on CCM, leading to significant performance degradation in DCM operation. The proposed methodology can be seamlessly integrated into DC-DC converter design phase, and it is not restricted for specific DC-DC topologies or control architectures. As a case study, we apply the proposed approach to the design of a Type-Iii compensation network in a voltage-mode controlled Buck converter, aiming to improve the load-transient response. The optimization process is carried out in MATLAB. Then, a performance comparison with the conventionally designed controller is conducted via SIMPLIS simulations. An improvement in overall performance is demonstrated.

Motion Artifact (MA) noise is one of the most crucial components in an Electrocardiogram (ECG) signal, especially during the monitoring of normal daily activities. Because of this, they are widely investigated for optimized denoising applications, trying to maximize the physiological information while solving the noise-signal frequency overlapping. In this work, we propose a filtering approach that employs the Multilevel Discrete Wavelet Decomposition (MDWD) basis domain, in which the projections of the signal are easily separable from the noise components. Compared to other more complex denoising approaches, this method only requires the simple projection of the signal on the desired wavelet basis. We obtain the desired denoising effect through the elimination of part of the projected signal, i.e., we remove the projected coefficients with the largest scaling values. We show that these coefficients carry most of the noise introduced by MA. To validate the method and tune its parameters, we test ECG affected by MA from different datasets, proving that the reconstruction performance is on par with the state-of-the-art approaches, such as the Empirical Wavelet Transform method (EWT), while begin much simpler in practice. Moreover, while other approaches tend to destroy signal anomalies and non-idealities which are fundamental for diagnosis, our approach keeps them unaltered.

As neural networks are trained to perform tasks of increasing complexity, their size increases, which presents several challenges in their deployment on devices with limited resources. To cope with this, a recently proposed approach hinges on substituting the classical Multiply-and-ACcumulate (MAC) neurons in the hidden layers with other neurons called Multiply-And-Max/min (MAM) whose selective behavior helps identify important interconnections, thus allowing aggressive pruning of the others. Hybrid MAM&MAC structures promise a 10x or even 100x reduction in their memory footprint compared to what can be obtained by pruning MAC-only structures. However, a cornerstone of maintaining this promise is the assumption that MAC&MAM architectures have the same expressive power as MAC-only ones. To concretize such a cornerstone, we take here a step in the theoretical characterization of the capabilities of mixed MAM&MAC networks. We prove, with two theorems, that two hidden MAM layers followed by a MAC neuron with possibly a normalization stage is a universal approximator.

The growing interest in the Internet of Things (IoT) and mobile artificial intelligence applications is pushing the investigation on deep neural networks (DNNs) that can operate at the edge using low-resources/energy devices. To obtain such a goal, several pruning techniques have been proposed in the literature. They aim to reduce the number of interconnections-and consequently the size, and the corresponding computing and storage requirements-of DNNs that traditionally rely on classic multiply-and-accumulate (MAC) neurons. In this work, we propose a novel neuron structure based on a multiply-and-max/min (MAM) map-reduce paradigm, and we show that by exploiting this new paradigm it is possible to build naturally and aggressively prunable DNN layers, with a negligible loss in performance. This novel structure allows a greater interconnection sparsity when compared to classic MAC-based DNN layers. Moreover, most of the already existing state-of-the-art pruning techniques can be used with MAM layers with little to no changes. To test the pruning performance of MAM, we employ different models-AlexNet, VGG-16 and the more recent ViT-B/16-and different computer vision datasets-CIFAR-10, CIFAR-100, and ImageNet-1K. Multiple pruning approaches are applied, ranging from single-shot methods to training-dependent and iterative techniques. As a notable example, we test MAM on the ViT-B/16 model fine-tuned on the ImageNet-1K task and apply one-shot gradient-based pruning. We remove interconnections until the model experiences a 6% decrease in accuracy. While the selected MAC-based layers need at least 38.2% remaining interconnections, MAM-based layers achieve the same accuracy with only 0.1%.

Due to its intrinsic sparsity both in time and space, event-based data is optimally suited for edge-computing applications that require low power and low latency. Time varying signals encoded with this data representation are best processed with Spiking Neural Networks (SNN). In particular, recurrent SNNs (RSNNs) can solve temporal tasks using a relatively low number of parameters, and therefore support their hardware implementation in resource-constrained computing architectures. These premises propel the need of exploring the properties of these kinds of structures on low-power processing systems to test their limits both in terms of computational accuracy and resource consumption, without having to resort to full-custom implementations. In this work, we implemented an RSNN model on a low-end, resource-constrained ARM-Cortex-M4-based Micro Controller Unit (MCU). We trained it on a down-sampled version of the N-MNIST event-based dataset for digit recognition as an example to assess its performance in the inference phase. With an accuracy of 97.2%, the implementation has an average energy consumption as low as$4.1\ \mu\mathrm{J}$and a worst-case computational time of$150.4\ \mu\mathrm{s}$per time-step with an operating frequency of 180 MHz, so the deployment of RSNNs on MCU devices is a feasible option for small image vision real-time tasks.

Subspace analysis (SA) is a widely used technique for coping with high-dimensional data and is becoming a fundamental step in the early treatment of many signal-processing tasks. However, traditional SA often requires a large amount of memory and computational resources, as it is equivalent to eigenspace determination. To address this issue, specializedstreamingalgorithms have been developed, allowing SA to be run on low-power devices, such as sensors or edge devices. Here, we present a classification and a comparison of these methods by providing a consistent description and highlighting their features and similarities. We also evaluate their performance in the task of subspace identification with a focus on computational complexity and memory footprint for different signal dimensions. Additionally, we test the implementation of these algorithms on common hardware platforms typically employed for sensors andedgedevices.

The increasing need for small and low-power Deep Neural Networks (DNNs) for edge computing applications involves the investigation of new architectures that allow good performance on low-resources/mobile devices. To this aim, many different structures have been proposed in the literature, mainly targeting the reduction in the costs introduced by the Multiply and Accumulate (MAC) primitive. In this work, a DNN layer based on the novel Sum and Max (SAM) paradigm is proposed. It does not require either the use of multiplications or the insertion of complex non-linear operations. Furthermore, it is especially prone to aggressive pruning, thus needing a very low number of parameters to work. The layer is tested on a simple classification task and its cost is compared with a classic DNN layer with equivalent accuracy based on the MAC primitive, in order to assess the reduction of resources that the use of this new structure could introduce.

Approaches for reconstructing signals encoded with Compressed Sensing (CS) techniques, and based on Deep Neural Networks (DNNs) are receiving increasing interest in the literature. In a recent work, a new DNN-based method named Trained CS with Support Oracle (TCSSO) is introduced, relying the signal reconstruction on the two separate tasks of support identification and measurements decoding. The aim of this paper is to improve the TCSSO framework by considering actual implementations using a finite-precision hardware. Solutions with low memory footprint and low computation requirements by employing fixed-point notation and by reducing the number of bits employed are considered. Results using synthetic electrocardiogram (ECG) signals as a case study show that this approach, even when used in a constrained-resources scenario, still outperform current state-of-art CS approaches.