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Aniello Cammarano

dblp:246/9667 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 100%
Computer networks
1 paper
Software-defined and programmable networks · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › FPGA-based network processing
FPGA-based network interface		 0.412020
hXDP: Efficient Software Packet Processing on FPGA NICs · OSDI 2020
Software-defined and programmable networks
programmable data plane		 0.112020
hXDP: Efficient Software Packet Processing on FPGA NICs · OSDI 2020

Methods — techniques the papers use, named apart from their topics

XDP · 0.9
YearPublicationVenuePosition
2020 hXDP: Efficient Software Packet Processing on FPGA NICs
M. Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi 0001, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco
 OSDI7