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Marcus Chow

dblp:247/5256 · DBLP profile ↗
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3ranked-venue papers
2as first author
2since 2021 · last 2023
0000-0002-2577-8914ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
GPUs and heterogeneous computing · 47% Cloud and datacenter computing · 34% Parallel and multicore computing · 19%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing
inference serving
0.712023
KRISP: Enabling Kernel-wise RIght-sizing for Spatial Partitioned GPU Inference Servers · HPCA 2023
Parallel and multicore computing › synchronization
fine-grain synchronization
0.412020
Independent Forward Progress of Work-groups · ISCA 2020
GPUs and heterogeneous computing › GPU scheduling
GPU kernel scheduling
0.412020
Independent Forward Progress of Work-groups · ISCA 2020
Cloud and datacenter computing › resource allocation
dynamic resource allocation
0.112020
Independent Forward Progress of Work-groups · ISCA 2020

Methods — techniques the papers use, named apart from their topics

spatial partitioning · 0.7hardware-software co-design · 0.4context switching · 0.4
YearPublicationVenuePosition
2023 KRISP: Enabling Kernel-wise RIght-sizing for Spatial Partitioned GPU Inference Servers
abstract
Machine learning (ML) inference workloads present significantly different challenges than ML training workloads. Typically, inference workloads are shorter running and under-utilize GPU resources. To overcome this, co-locating multiple instances of a model has been proposed to improve the utilization of GPUs. Co-located models share the GPU through GPU spatial partitioning facilities, such as Nvidia’s MPS, MIG, or AMD’s CU Masking API. Existing spatially partitioned inference servers create model-wise partitions by "right-sizing" based on a model’s latency tolerance to restricting resources. We show that model-wise right-sizing is under-utilized due to varying resource restriction tolerance of individual kernels within an inference pass.We propose Kernel-wise Right-sizing for Spatial Partitioned GPU Inference Servers (KRISP) to enable kernel-wise right-sizing of spatial partitions at the granularity of individual kernels. We demonstrate that KRISP can support a greater level of concurrently running inference models compared to existing spatially partitioned inference servers. KRISP improves overall throughput by 2x when compared with an isolated inference (1.22x vs prior works) and reduce energy per inference by 33%.
Marcus Chow, Ali Jahanshahi, Daniel Wong 0001
HPCA1
2022 GPUCalorie: Floorplan Estimation for GPU Thermal Evaluation
abstract
GPUs are massively parallel architecture that consume significant power, which lead to high thermal output. Thermal constraints of GPUs are one of the major limitations in high performance, mobile and embedded applications. However, accurate thermal modeling tools for GPUs are lacking for researchers. We identify that limiting factors to further research are the absence of GPU floorplans necessary for thermal modeling, validated thermal trends, and outdated component-level power models. To this end, we present GPUCalorie, a thermal modeling methodology using specialized infrared thermography setup for measuring and validating thermal behaviors of real GPUs. We validate a floorplan of Nvidia’s GTX1050 identified through our infrared thermography setup. We validate the GPUCalorie identified floorplan against a real GTX1050 GPU, showing 10% error for the thermal map.
Marcus Chow, Ali Jahanshahi, Ana Cardenas Beltran, Sheldon X.-D. Tan, Daniel Wong 0001
ISPASS1
2020 Independent Forward Progress of Work-groups
abstract
GPUs have evolved from providing highly-constrained programmability for a single kernel to using pre-emption to ensure independent forward progress for concurrently executing kernels. However, modern GPUs do not ensure independent forward progress for kernels that use fine-grain synchronization to coordinate inter-work-group execution. Enabling independent forward progress among work-groups (WGs) is challenging as pre-empted kernels may be rescheduled with fewer hardware resources. This can lead to oversubscribed execution scenarios that deadlock current hardware even for correctly written code. Prior work addresses this problem by requiring programmers to specify resource requirements and assuming static resource allocation, which adds scheduling constraints and reduces portability. We propose a family of novel hardware approaches - trading off hardware complexity for performance - that provide independent forward progress in the presence of fine-grain inter-WG synchronization and dynamic resource allocation. Additionally, we propose new waiting atomic instructions compatible with proposed C++ 20 extensions. Our final design, Autonomous Work-Groups (AWG), uses hints from regular and waiting atomics to cooperatively schedule WGs within a kernel, improving efficiency and virtualizing hardware resources. In non-oversubscribed scenarios, AWG outperforms a busy-waiting baseline (which deadlocks in oversubscribed scenarios) by 12× on average for benchmarks that use different mutexes and barriers for fine-grained, WG granularity synchronization. Furthermore, AWG outperforms other solutions that do not deadlock in the oversubscribed case, such as fixed-interval round-robin context switching or naively extending monitor/mwait to GPUs, by 2.6× and 2.2×, respectively.
Alexandru Dutu, Matthew D. Sinclair, Bradford M. Beckmann, David A. Wood 0001, Marcus Chow
ISCA5