EDBT 2026 Demo / reviewers in the wild / expert
Navnit Kumar
dblp:247/9935
· DBLP profile ↗
3ranked-venue papers
3as first author
3since 2021 · last 2026
0000-0001-7024-3989ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author · 3 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | An Electronically Tunable Dual Flux-Controlled Floating Memristor EmulatorabstractIn recent years, memristor emulators have been utilized in a wide range of applications including neuromorphic computing, security, analog signal processing, and other related fields. This article introduces a novel electronically tunable dual flux controlled floating memristor emulator employing single Current Controlled Differential Difference Current Conveyor (CCDDCC), a MOS capacitor, and one PMOS transistor. The core of the suggested emulator features an electronically tunable CCDDCC-based feedback circuit. The proposed circuit avoids passive components, diodes, and analog multiplier circuits. The suggested memristor has the ability to tune the area of the pinch hysteresis loop without altering the input frequency, input voltage, MOS capacitance, and active component. The circuit operates effectively within a 300 MHz frequency range and demonstrates a well-defined pinched hysteresis loop. Its performance is evaluated using 180 nm TSMC parameters, with a compact layout area of 758.12 μm². Additionally, the robustness of the circuit is thoroughly assessed through analyses of temperature variations, supply voltage fluctuations, transistor size variations, and process corner simulations. Navnit Kumar, Neeta Pandey, Manjeet Kumar, Shahram Minaei |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2023 | Electronically tunable positive and negative fractional order inductor circuit using single topology
Navnit Kumar, Manjeet Kumar, Neeta Pandey |
Integr. | 1 |
| 2023 | CCTA based four different pairs of mutually coupled circuit using single topology
Navnit Kumar, Manjeet Kumar, Neeta Pandey |
Integr. | 1 |