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Shixin Song

dblp:248/0375 · DBLP profile ↗
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3ranked-venue papers
3as first author
3since 2021 · last 2025
0009-0007-5638-5164ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 2 · 2 first-author · 2 since 2021Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Systems and software security · 46% Hardware security and side channels · 30% Cryptographic primitives and cryptanalysis · 23%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 89% Cloud and datacenter computing · 5% Performance modeling and evaluation · 5%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Systems and software security › memory safety
address space layout randomization
0.912025
Oreo: Protecting ASLR Against Microarchitectural Attacks · NDSS 2025
Cryptographic primitives and cryptanalysis › cryptographic implementation
constant-time implementation
0.912025
Securing Cryptographic Software via Typed Assembly Language · CCS 2025
Systems and software security
memory safety
0.912025
Oreo: Protecting ASLR Against Microarchitectural Attacks · NDSS 2025
Hardware security and side channels
side-channel countermeasures
0.912025
Securing Cryptographic Software via Typed Assembly Language · CCS 2025
Processor architecture and microarchitecture
branch prediction
0.612022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022
Processor architecture and microarchitecture › branch prediction
branch target buffer
0.612022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022
Processor architecture and microarchitecture › instruction fetch › instruction prefetching
fetch directed instruction prefetching
0.612022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022
Processor architecture and microarchitecture
front-end
0.612022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022
Hardware security and side channels
microarchitectural attacks
0.312025
Oreo: Protecting ASLR Against Microarchitectural Attacks · NDSS 2025
Processor architecture and microarchitecture › speculative execution › speculative execution attacks
spectre
0.312025
Securing Cryptographic Software via Typed Assembly Language · CCS 2025
Processor architecture and microarchitecture
speculative execution
0.312025
Securing Cryptographic Software via Typed Assembly Language · CCS 2025
Cloud and datacenter computing › datacenter workloads
datacenter applications
0.212022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022
Performance modeling and evaluation
workload characterization
0.212022
Thermometer: profile-guided btb replacement for data center applications · ISCA 2022

Methods — techniques the papers use, named apart from their topics

typed assembly language · 1.7profile-guided optimization · 0.6
YearPublicationVenuePosition
2025 Securing Cryptographic Software via Typed Assembly Language
abstract
Authors of cryptographic software are well aware that their code should not leak secrets through its timing behavior, and, until 2018, they believed that following industry-standard constant-time coding guidelines was sufficient. However, the revelation of the Spectre family of speculative execution attacks injected new complexities.
Shixin Song, Tingzhen Dong, Kosi Nwabueze, Julian Zanders, Andres Erbsen, Adam Chlipala, Mengjia Yan 0001
CCS1
2025 Oreo: Protecting ASLR Against Microarchitectural Attacks
Shixin Song, Joseph Zhang, Mengjia Yan 0001
NDSS1
2022 Thermometer: profile-guided btb replacement for data center applications
abstract
Modern processors employ a decoupled frontend with Fetch Directed Instruction Prefetching (FDIP) to avoid frontend stalls in data center applications. However, the large branch footprint of data center applications precipitates frequent Branch Target Buffer (BTB) misses that prohibit FDIP from eliminating more than 40% of all frontend stalls. We find that the state-of-the-art BTB optimization techniques (e.g., BTB prefetching and replacement mechanisms) cannot eliminate these misses due to their inadequate understanding of branch reuse behavior in data center applications.
Shixin Song, Tanvir Ahmed Khan 0001, Sara Mahdizadeh-Shahri, Akshitha Sriraman, Niranjan Soundararajan, Sreenivas Subramoney, Daniel A. Jiménez, Heiner Litz, Baris Kasikci
ISCA1