Demo Data from EDBT 2026 / reviewers in the wild / expert
J. Nicholas Coleman
dblp:248/1856
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-authorTheory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 75% Processor architecture and microarchitecture · 25% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
arithmetic unit |
0.2 | 1 | 2016 | LNS with Co-Transformation Competes with Floating-Point · IEEE Trans. Computers 2016 |
Integrated circuit design
cotransformation |
0.2 | 1 | 2016 | LNS with Co-Transformation Competes with Floating-Point · IEEE Trans. Computers 2016 |
Integrated circuit design
digital arithmetic circuits |
0.2 | 1 | 2016 | LNS with Co-Transformation Competes with Floating-Point · IEEE Trans. Computers 2016 |
Integrated circuit design › digital circuit design › arithmetic circuit design
logarithmic number system |
0.2 | 1 | 2016 | LNS with Co-Transformation Competes with Floating-Point · IEEE Trans. Computers 2016 |
Methods — techniques the papers use, named apart from their topics
logic synthesis · 0.2ROM table reduction · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | LNS with Co-Transformation Competes with Floating-PointabstractThe logarithmic number system has been proposed as an alternative to floating-point arithmetic. Multiplication, division and square-root operations are accomplished with inexpensive fixed-point methods, but addition and subtraction are considerably more challenging. Recent work has demonstrated that these operations too can be done with similar speed and accuracy to their FP equivalents, but the necessary circuitry is complex. In particular, it is dominated by the need for large ROM tables for the storage and interpolation of non-linear functions. We describe a new co-transformation procedure that eliminates much of the ROM space and allows the easy synthesis of the remainder in logic, and we then evaluate several interpolation methods that might benefit from it. Synthesised 32-bit implementations are compared with floating-point units, and show substantial reductions in delay, with equivalent accuracy and area. J. Nicholas Coleman, Rizalafande Che Ismail |
IEEE Trans. Computers | 1 |
| 2011 | ROM-less LNSabstractThe logarithmic number system has been proposed as an alternative to floating-point arithmetic. Multiplication, division and square-root operations are accomplished with fixed-point methods, but addition and subtraction are considerably more challenging. Recent work has demonstrated that these operations too can be done with similar speed and accuracy to their FP equivalents, but the necessary circuitry is complex. In particular, it is dominated by the need for large ROM tables for the storage of non-linear functions. This paper describes two algorithms, a new co-transformation procedure and an improvement to an existing interpolation method, that reduce these tables to an extent that allows their easy synthesis in logic. An implementation shows substantial reductions in area and delay from the previous best 32-bit realisation, with equivalent accuracy. Rizalafande Che Ismail, J. Nicholas Coleman |
IEEE Symposium on Computer Arithmetic | 2 |