This article proposes a novel macromodeling method for high-frequency nonlinear circuits, utilizing an attention-based deep recurrent neural network (ATDRNN). This method leverages the attention mechanism within the RNN, comparing each time step with other time steps to determine their similarities. It then applies some coefficients as weights to the features of each time step based on these similarities, enhancing the RNN’s ability to focus on more informative features. Consequently, this approach allows for more accurate modeling of nonlinear circuits. Additionally, having comprehensive signal information and similarities between various time steps mitigates the vanishing gradient problem commonly faced by RNNs. The models derived from this method not only exhibit superior accuracy compared to the conventional RNNs, but also run much faster than existing transistor-level models in circuit simulators. The effectiveness of the proposed method is demonstrated by modeling two nonlinear circuits, namely 2-coupled and 3-coupled line high-speed interconnects driven by multi-stage buffers.

In the computer-aided design (CAD) area, the recurrent neural network (RNN) has shown notable functionality in generating fast and high-performance models rather than the models in simulation tools. Predicting time sequences is a pervasive and challenging problem that may require identifying the dependencies between sequences that RNN is capable of performing. Despite all its features, conventional RNN still faces challenges such as limited accuracy and a large number of parameters. Therefore, we propose new macromodeling methods for nonlinear circuits called the Clockwork-RNN (CWRNN) and its hybrid version which is a more powerful but simpler implementation of a conventional RNN architecture with relatively little model complexity. In addition, CWRNN inherently models complex dependencies without the need for a large number of parameters. As a result, the computational cost is less than conventional RNN. Moreover, understanding and implementing the CWRNN is relatively simple and provides great flexibility in architectural configuration by introducing modules with several clock rates of exponents of 2. In addition to the above new modeling technique, we proposed the Hybrid-Module CWRNN as another new modeling method that utilizes modules of various exponents of different numbers resulting in further accuracy improvement of the CWRNN. Furthermore, the models obtained from the proposed techniques required much smaller simulation times compared to the current models used in simulation tools. Three nonlinear high-frequency examples have been utilized to verify the benefits of the proposed modeling methods.

This paper proposes a new hybrid structure and microwave modeling method that combines polynomial regression with batch-normalized deep feedforward neural network (BN-DFN) to be used in high-dimensional microwave circuit modeling. Utilizing the proposed BN-DFN method results in a remarkably faster training procedure compared to the conventional DFN. In addition, the superiority of the BN-DFN method over DFN in terms of accuracy prepares this opportunity to perform high-dimensional microwave modeling using fewer training data in comparison with the modeling with conventional DFN. The results show that a data reduction of about 40-80% can be achieved for microwave applications used in this paper using the proposed method. Also, in this paper, a hybrid polynomial regression BN-DFN (HPBN-DFN) is proposed to further improve the accuracy of the proposed BN-DFN method. The proposed HPBN-DFN method fine-tunes the predicted values of the BN-DFN by passing them through a polynomial regression stage for increasing accuracy. The proposed methods are verified through two high-dimensional parameter-extraction modeling examples of microwave filters.

Efficient design and optimization of flip-flops can significantly affect overall circuit performance as they have many applications in digital systems which can impact the overall power consumption and timings of the emerging system on chips (SOCs). In this paper, modeling, design, and optimization of transmission gate-based master-slave positive-edge-triggered flip-flop (TGFF) in 16 nm complementary metal-oxide semiconductor (CMOS) is proposed. The proposed deep neural network (DNN)-based optimization method first generates an accurate model for different performance metrics by using the training data obtained from transistor-level models which are over 100 times faster than them. Then, these accurate DNN-based models are used to optimize design goals such as dynamic and static power, setup time, and propagation delay (Data to Output). Using these fast, accurate models significantly speed up the design procedure and leads to a considerably more optimized design. Additionally, as the DNN is a universal approximator that can catch any nonlinear input-output relationship, the proposed method can be used to optimize circuits for any performance metric, even if no analytical formula is available. Additionally, circuit design based on the proposed method is automated which, facilitates the tasks of circuit designers.

A new structure and macromodeling approach which is an advance over high-order recurrent neural network named bidirectional high-order deep recurrent neural network (BIHODRNN) is proposed in this paper for the first time for nonlinear circuits. In the proposed structure, besides the fully connected weights to the neurons of multiple previous time steps of the same hidden layer in conventional high-order recurrent neural network (HORNN), there are additional fully connected weights to the neurons of that hidden layer for multiple next times steps. Due to more training parameters compared to conventional RNN and HORNN, the proposed BIHODRNN can train and predict more complex relationships in a faster and more efficient way and can better capture long-term dependencies. Also, because of bidirectional structure with multiple orders to the next time steps, it can predict the output signals beyond the training time intervals with much better accuracy. To improve the accuracy of the proposed BIHODRNN even more, another structure and method called Hybrid BIHODRNN was presented in this paper. By combining layers of different orders and different directionality in Hybrid BIHODRNN, the training parameters are significantly decreased leading to the reduction of overfitting problem and increasing the model accuracy. Furthermore, the proposed BIHODRNN and its hybrid version need smaller number of training data compared to the HODRNN for generating a model with similar accuracy. Moreover, two proposed approaches are notably faster than the transistor-level models in circuit simulators for acquiring similar accuracy. The superiorities of the proposed approaches are investigated by modeling two nonlinear circuit examples, namely, 5-coupled and 3-coupled line high-speed interconnects both driven by a four-stage driver.

In this paper, for the first time, the deep gated recurrent unit (Deep GRU) is used as a new macromodeling approach for nonlinear circuits. Similar to Long Short-Term Memory (LSTM), the GRU has gating units that control the information flow and makes the network less prone to the vanishing gradient problem. Having a smaller number of gates causes GRU to have fewer parameters compared to LSTM leading to better model accuracy. Using the gates leads gradient formulations to have additive nature which helps them to be more resistant to vanishing and consequently learn long sequences of data. The proposed macromodeling method is capable of modeling nonlinear circuits more accurately and using fewer parameters compared to the conventional LSTM macromodeling method. To further improve the GRU performance, a regularization technique called Gaussian dropout is applied in this paper on deep GRU (GDGRU) to reduce the overfitting problem resulting in better test error. Additionally, the models obtained from the proposed techniques are remarkably faster than the original transistor-level models. To verify the superiority of the proposed method, time-domain modeling of three nonlinear circuits is provided. For these circuits, the comparisons of the accuracy and speed between the conventional recurrent neural network (RNN), the LSTM, and the proposed macromodeling methods are provided.