Tracking soccer players using broadcast TV images is a challenging problem because of players' quick movements, occlusion, and camera movements. This paper presents a framework to track multiple players using the temporal spatio-velocity (TSV) transform. The TSV transform is a combination of a windowing process and the Hough transform. We have previously introduced the TSV transform to extract velocity-stable blobs using binary image sequences. In this paper, we extend the transform to apply to grayscale or color images in order to track object textures. We also increase the computational performance of the TSV transform by setting a computational window around the blob being tracked. This operation, which we call the "local TSV transform ", maintains the computational window at the center of the tracked object and provides an alternate means of tracking when players become occluded, a common problem in broadcast TV images. The performance of the system on a soccer video is demonstrated.

Polarimetric SAR interferometry has been widely studied for forest observations. The technique utilizes polarization state difference among local scattering centers of the forest to decompose them. Using the method, we can estimate precise forest parameters. We proposed an alternative method based on the ESPRIT algorithm for the estimation. The method can detect as many as 3 local scatterers with fully polarimetric data, and can extract interferometric phase of each local scatterer. In this paper, we verify the availability of the method in 2- and 3-local-scatterer model for forest estimation, and show that forest analysis with 3-local-scatterer improve height estimation accuracy. SIR-C/X-SAR data were used for these verifications. In addition, experimental results of restricted dual-polarization data are also provided to show availability of the method.

One of the greatest challenges in a C/C++-based design methodology is efficiently mapping C/C++ models into hardware. Many networking and multimedia applications implemented in hardware or mixed hardware/software systems now use complex data structures stored in multiple memories, so many C/C++ features that were originally designed for software applications are now making their way into hardware. Such features include dynamic memory allocation and pointers for managing data. We present a solution for efficiently mapping arbitrary C code with pointers and malloc/free into hardware. Our solution, which fits current memory management methodologies, instantiates an application-specific hardware memory allocator coupled with a memory architecture. Our work also supports the resolution of pointers without restriction on the data structures. We present an implementation based on the SUIF framework along with case studies such as the realization of a video filter and an ATM segmentation engine.

One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemented in hardware or mixed hardware/software systems are making use of complex data structures stored in one or multiple memories. As a result, many of the C/C++ features which were originally designed for software applications are now making their way into hardware. Such features include dynamic memory allocation and pointers used to manage data. We present a solution for efficiently mapping arbitrary C code with pointers and malloc/free into hardware. Our solution fits current memory management methodologies. It consists of instantiating a hardware allocator tailored to an application and a memory architecture. Our work also supports the resolution of pointers without restriction on the data structures. An implementation using the SUIF framework is presented, followed by some case studies such as the realization of a video filter.

To reduce the number of synthesis and layout iterations, we present a new delay optimization technique, which inserts buffers based on back-annotated detailed routing information. During optimization, inserted buffers are assumed to be placed on the appropriate location of original wires so as to calculate accurate wire RC delay. With forward annotated location information of inserted buffers, the layout system attempts to preserve patterns of original wires using the ECO technique. Our experimental results show that this technique combined with the conventional gate sizing technique achieves up to 41.2% delay reduction after the initial layout.