As the core counts continue to scale in manycore processors, the increasing bandwidth pressure on the network-on-chip (NoC) and last-level cache (LLC) emerges as a critical performance bottleneck.While shared-data multicasting from the LLC can alleviate this pressure by combining responses heading to the same direction, existing solutions face fundamental challenges in accurately identifying complete sharer sets and avoiding unnecessary data responses.In this work, we propose Software Prefetch Multicast (SPM), a softwarehardware co-design that addresses these limitations through sharerexposed prefetching for bandwidth-efficient multicast.SPM introduces three key innovations: (1) New software-hardware interfaces including sharer group configuration and sharer-exposed prefetching instructions, enabling software-directed multicast initiation;(2) A corresponding microarchitecture for sharer group configuration that supports sharer-group-based multicast triggering in LLC through representative prefetch requests from leader threads; and(3) A dynamic leader thread switching algorithm to accommodate thread variation.Compared with a system with software prefetching, SPM achieves an average of 42% NoC bandwidth saving, a geometric mean of 1.28× and a maximum of 1.46× speedup in a 16-core system.In a 64-core system, it can achieve an average of 50% NoC bandwidth saving, along with a geomean of 1.38× and a maximum of 1.86× speedup.

During the Orbital B Phase mission of the Origins, Spectral Interpretation, Resource Identification, and Security-Regolith Explorer (OSIRIS-REx), the OSIRIS-REx Laser Altimeter (OLA) instrument scanned asteroid Bennu and obtained hundreds of point cloud frames, making a meticulous 3-D surface modeling of Bennu realizable. However, these acquired point clouds suffer from problems such as inaccurate pose information, low overlap ratios, uneven densities, and outliers. To create a precise 3-D shape model via topographical mapping using OLA data, we present an optimized connection graph-guided global bundle block adjustment (BA) method with variable weights capable of constructing a complete 3-D model of the asteroid via a straightforward global adjustment of offsets. Specifically, by using an improved Fast Double-channel Aggregated Feature Transform (iFDAFT), 3-D keypoint extraction and their correspondences can be determined with a subpixel level of matching accuracy. Then, a graph of the shortest path algorithm is constructed to establish the optimized connections of all the OLA point clouds. Afterward, the global bundle BA method with variable weights is introduced to minimize the keypoint matches simultaneously, reducing the offsets between the overlapping point clouds. Finally, the shape model of asteroid Bennu was constructed using the finely adjusted point clouds, with RMSE as small as 0.0743 m compared with the reference shape model, reaching approximately the limit of the instrument range errors (i.e., 3 cm) of observation data. Results of the case study on asteroid Bennu demonstrated that the proposed method could improve the accuracy of point cloud registration and meet the application requirements.

Communication frequency is increasing with the growing complexity of emerging embedded applications and the number of processors in the implemented multiprocessor SoC architectures. In this article, we consider the issue of communication cost reduction during multithreaded code generation from partitioned Simulink models to help designers in code optimization to improve system performance. We first propose a technique combining message aggregation and communication pipeline methods, which groups communications with the same destinations and sources and parallelizes communication and computation tasks. We also present a method to apply static analysis and dynamic emulation for efficient communication buffer allocation to further reduce synchronization cost and increase processor utilization. The existing cyclic dependency in the mapped model may hinder the effectiveness of the two techniques. We further propose a set of optimizations involving repartition with strongly connected threads to maximize the degree of communication reduction and preprocessing strategies with available delays in the model to reduce the number of communication channels that cannot be optimized. Experimental results demonstrate the advantages of the proposed optimizations with 11--143% throughput improvement.

In H.264/AVC decoding system, motion compensation operation occupies about 80% of the total memory access and becomes the system bottleneck. In this paper, a high efficient memory architecture for H.264/AVC motion compensation is proposed to extremely reduce external memory access bandwidth. A four-level hierarchical memory organization scheme is utilized to explore the reusability of neighboring blocks at an acceptable area cost. To improve the system processing throughput, five optimization techniques are adopted in motion compensation operation, which enable video decoder to achieve real-time decoding of HD 1080p video stream when operating at 110 MHz. Compared with the existing works, the proposed architecture is able to reduce the memory bandwidth requirement in motion compensation progress by 83.7% and performs better in the real-time application.