Demo Data from EDBT 2026 / reviewers in the wild / expert
Weixin Lin
dblp:251/6546
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0001-2212-5299ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 77% Processor architecture and microarchitecture · 23% | |
| Software engineering, system software, and programming languages
1 paper |
Software maintenance and evolution · 100% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation › software performance engineering
software performance analysis |
1.0 | 1 | 2026 | Towards On-the-Fly Code Performance Profiling · ACM Trans. Softw. Eng. Methodol. 2026 |
Processor architecture and microarchitecture
pipelining |
0.3 | 1 | 2026 | Towards On-the-Fly Code Performance Profiling · ACM Trans. Softw. Eng. Methodol. 2026 |
Methods — techniques the papers use, named apart from their topics
program graph fusion · 2.0graph neural network · 2.0gated graph neural network · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Towards On-the-Fly Code Performance ProfilingabstractImproving the performance of software applications is one of the most important tasks in software evolution and maintenance. In the Intel Microarchitecture, CPUs employ pipelining to utilize resources as effectively as possible. Some types of software patterns or algorithms can have implications on the underlying CPU pipelines and result in inefficiencies. Therefore, analyzing how well the CPU’s pipeline(s) are being utilized while running an application is important in software performance analysis. Existing techniques, such as Intel VTune Profiler, usually detect software performance issues from CPU pipeline metrics after the software enters production and during the running time. These techniques require developers to manually analyze monitoring data and perform additional test runs to obtain relevant information about performance problems. It costs a lot of time and human effort for developers to build, deploy, test, execute, and monitor the software. To alleviate these problems, we propose a novel approach named PGProf to predict the CPU pipeline before execution and provide the profiling feedback during the development process. PGProf exploits the graph neural networks to learn semantic and structural representations for C functions and then predict the fraction of pipeline slots in each category for them during the development process. Given a code snippet, we fuse different types of code structures, e.g., Abstract Syntax Tree (AST), Dataflow Graph (DFG), and Control Flow Graph (CFG) into one program graph. During offline learning, we first leverage the gated graph neural network to capture representations of C functions. PGProf then automatically estimates the final pipeline values according to the learned semantic and structural features. For online prediction, we predict pipeline metrics with four category values by leveraging the offline trained model. We build our dataset from C projects in GitHub and use Intel VTune profiler to get profiling information by running them. Extensive experimental results show the promising performance of our model. We achieved absolute result of 49.90% and 79.44% in terms of \(Acc@5\%\) and \(Acc@10\%\) with improvements of 8.0%–42.7% and 7.8%–20.1% over a set of baselines. Xing Hu 0008, Weixin Lin, Michael Ling, Xin Xia 0001, Yuan Wang 0008, David Lo 0001 |
ACM Trans. Softw. Eng. Methodol. | 2 |