This paper proposes a space vector-based pulse width modulation scheme that incorporates common-mode voltage elimination and bus clamping for a dual six-phase inverter configuration driving an asymmetrical six-phase motor with open-end stator windings. The proposed scheme completely eliminates the common-mode voltage generated by both inverters. Additionally, the employed switching sequence enables bus clamping, which reduces switching losses compared to conventional patterns. The clamping strategy also ensures balanced power loss distribution among the switching devices. By eliminating the resultant common-mode voltage, the scheme allows for the use of a shared DC-link between the two inverters. Furthermore, it suppresses non-torque-producing harmonics in the stator windings of the ASPM and achieves higher DC bus utilization compared to conventional six-phase drive configurations. The effectiveness of the proposed scheme is validated through extensive simulations conducted in the MATLAB/Simulink environment.

Proportional-resonant and repetitive controllers are widely used for grid current control in single-phase grid-connected inverters. This paper presents a comparative study of the performance of these two controller types in mitigating low-order harmonics with a descriptive analysis of their design. Moreover, low-order harmonics arising from the dead time in single-phase highly efficient and reliable inverter concept (HERIC) are investigated. Then, a novel scheme based on the harmonic decoupling network and second-order generalized integrator is designed to extract the low-order harmonics from the grid current. These extracted components are subtracted from the reference current to efficiently attenuate the low-order components. Experimental studies show an efficient mitigation of the low-order harmonics with the proposed scheme.

A virtual voltage vector based direct torque control (DTC) scheme with enhanced DC bus utilization for an asymmetrical six-phase induction motor (ASPIM) with open-end stator windings is proposed in this paper. In this scheme, the voltage vectors generated by two six-phase, two-level voltage source inverters (VSI) connected to both sides of the stator windings are combined to obtain a virtual voltage (VV) space vector structure in the ASPIM. While generating the virtual voltage vectors it is ensured that the following three conditions prevails in the system: 1) elimination of resultant common mode voltage (CMV) across the stator windings, 2) elimination of triplen order harmonic voltages from the individual 3-phase windings, and 3) nullification of non-torque producing harmonic voltages. Conditions 1 and 2 facilitate the use of a common DC-link for both the VSIs without causing circulation of common mode currents through the stator windings. The third condition obliterates the large, non-torque-producing harmonic currents and consequent losses in the system. The proposed scheme can provide significantly higher DC bus utilization compared to the conventional schemes, for the same DC-link voltage. The effectiveness of the proposed scheme is verified by carrying out simulations using MATLAB-Simulink software, under transient and steady-state operating conditions of the drive.