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Riling Li

dblp:257/5379 · DBLP profile ↗
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3ranked-venue papers
1as first author
2since 2021 · last 2025
0000-0002-9545-3779ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Emerging computing paradigms · 67% High-performance computing · 20% Electronic design automation · 13%
Theoretical computer science
2 papers
Automata and formal languages · 82% Quantum computing and quantum information · 18%

Topics — the 8 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms
quantum computing
1.422025
A Divide-And-Conquer Pebbling Strategy for Oracle Synthesis in Quantum Computing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Equivalence Checking of Sequential Quantum Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Electronic design automation › hardware verification and test › formal verification
equivalence checking
0.612022
Equivalence Checking of Sequential Quantum Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Emerging computing paradigms › quantum computer architecture
quantum circuit verification
0.612022
Equivalence Checking of Sequential Quantum Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
High-performance computing
large-scale simulation
0.412020
Quantum Supremacy Circuit Simulation on Sunway TaihuLight · IEEE Trans. Parallel Distributed Syst. 2020
Emerging computing paradigms › quantum computer architecture
quantum circuit simulation
0.412020
Quantum Supremacy Circuit Simulation on Sunway TaihuLight · IEEE Trans. Parallel Distributed Syst. 2020
Emerging computing paradigms
quantum computer architecture
0.412020
Quantum Supremacy Circuit Simulation on Sunway TaihuLight · IEEE Trans. Parallel Distributed Syst. 2020
High-performance computing
supercomputing
0.412020
Quantum Supremacy Circuit Simulation on Sunway TaihuLight · IEEE Trans. Parallel Distributed Syst. 2020
Quantum computing and quantum information › quantum computing
quantum supremacy
0.112020
Quantum Supremacy Circuit Simulation on Sunway TaihuLight · IEEE Trans. Parallel Distributed Syst. 2020

Methods — techniques the papers use, named apart from their topics

state hilbert space · 1.1mealy machine model · 1.1hierarchical reversible logic synthesis · 0.9divide-and-conquer pebbling · 0.9amplitude calculation · 0.9statevector simulation · 0.4state-vector simulation · 0.4
YearPublicationVenuePosition
2025 A Divide-And-Conquer Pebbling Strategy for Oracle Synthesis in Quantum Computing
abstract
Quantum oracles are quantum circuits that implement classical Boolean functions, frequently used as independent black boxes in quantum algorithm design. The hierarchical reversible logic synthesis approach, a scalable method for large-scale oracle synthesis, relies on ancilla qubits to store intermediate results. The sequence in which these results are computed and uncomputed, governed by the reversible pebble game, greatly affects both qubit usage and circuit gate count. This paper introduces a novel divide-and-conquer pebbling strategy that reduces qubit count while maintaining a reasonable circuit gate count. Experimental results show up to a 90% reduction in qubits compared to the most commonly-used strategy, with an average increase of 3 to 4 times in quantum operations, all achieved within a reasonable runtime. In qubit-constrained tasks, our method achieves over 90% reduction in T-count. Additionally, we have incorporated our strategy into the hierarchical synthesis method and implemented it as a potential synthesizer for Qiskit, with experiments demonstrating that it outperforms the default synthesizer. The proposed approach shows promise in optimizing both qubit usage and circuit gate count for large-scale oracle synthesis problems.
Kezhen Zhang, Riling Li, Mingsheng Ying
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2022 Equivalence Checking of Sequential Quantum Circuits
abstract
We define a formal framework for equivalence checking of sequential quantum circuits. The model we adopt is a quantum state machine, which is a natural quantum generalization of Mealy machines. A major difficulty in checking quantum circuits (but not present in checking classical circuits) is that the state spaces of quantum circuits are continuums. This difficulty is resolved by our main theorem showing that equivalence checking of two quantum Mealy machines can be done with input sequences that are taken from some chosen basis (which are finite) and have a length quadratic in the dimensions of the state Hilbert spaces of the machines. Based on this theoretical result, we develop an (and to the best of our knowledge, the first) algorithm for checking equivalence of sequential quantum circuits with running time$\mathcal {O}(2^{3m+5l}(2^{3m}{\,+\,}2^{3l}))$, where$m$and$l$denote the numbers of input and internal qubits, respectively. The complexity of our algorithm is comparable with that of the known algorithms for checking classical sequential circuits in the sense that both are exponential in the number of (qu)bits. Several case studies and experiments are presented.
Qisheng Wang, Riling Li, Mingsheng Ying
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2020 Quantum Supremacy Circuit Simulation on Sunway TaihuLight
abstract
With the rapid progress made by industry and academia, quantum computers with dozens of qubits or even larger size are being realized. However, the fidelity of existing quantum computers often sharply decreases as the circuit depth increases. Thus, an ideal quantum circuit simulator on classical computers, especially on high-performance computers, is needed for benchmarking and validation. We design a large-scale simulator of universal random quantum circuits, often called “quantum supremacy circuits”, and implement it on Sunway TaihuLight. The simulator can be used to accomplish the following two tasks: 1) Computing a complete output state-vector; 2) Calculating one or a few amplitudes. We target the simulation of 49-qubit circuits. For task 1), we successfully simulate such a circuit of depth 39, and for task 2) we reach the 55-depth level. To the best of our knowledge, both of the simulation results reach the largest depth for 49-qubit quantum supremacy circuits.
Riling Li, Bujiao Wu, Mingsheng Ying, Xiaoming Sun 0001, Guangwen Yang 0002
IEEE Trans. Parallel Distributed Syst.1