The horizontal business model of modern semiconductors—where design, fabrication, and testing are handled by separate entities across a global supply chain—exposes integrated circuits (ICs) to various security threats throughout their lifecycle. Physical unclonable functions (PUFs) have emerged as effective hardware security primitives for device identification and attestation. However, integrating PUFs into existing designs is often manual, labor-intensive, and incurs high overhead in area, power, and design time. Moreover, traditional PUFs are typically localized to small regions of a chip, limiting entropy extraction from the full design surface. To address these limitations, we propose ASTRA, an automated framework that integrates PUF-based entropy sources into digital logic circuits in a distributed and timing-aware fashion. ASTRA enhances the conventional logic synthesis flow by inserting memory-in-logic PUFs (MeLPUFs), which are constructed using standard cell elements and offer high entropy. By distributing MeLPUF primitives across the circuit, ASTRA maximizes response randomness while minimizing area and power overhead. It can also reuse existing logic elements and supports multiple MeLPUF templates. ASTRA ensures timing constraints are respected and enables validation of both functional and logic equivalence checking (LEC) between the original and PUF-inserted designs. Experimental results show that ASTRA achieves near-ideal PUF quality metrics, demonstrating its effectiveness and scalability for secure hardware design.

Fault diagnosis is crucial for pinpointing failure causes in manufactured chips, improving yield. The primary objective is to accurately narrow down potential fault locations in a circuit. However, the effectiveness of diagnosis algorithms heavily depends on the quality of the test set. If the test set fails to distinguish between fault pairs, the algorithm struggles to identify many faults. This highlights the need for a metric to quantify the diagnostic capability of test sets based on their efficacy. Traditional diagnosis methods, while accurate, face limitations due to their space and time complexity. Selecting the most suitable test set for improved diagnosis becomes challenging when multiple sets have the same fault coverage. This literature introduces a new machine learning-based diagnostic method to evaluate the diagnostic efficacy of test vectors using a Failure Catalogue, which includes failure ID, test pattern, targeted faults, expected and actual response, and failing scan and primary outputs. Four benchmark circuits are compared based on features such as the number of gates, drivers, loads, ports, faults, area, and power. The diagnostic accuracy of various machine learning models, including Random Forest, Decision Tree, K-Nearest Neighbors (KNN), and Support Vector Machine (SVM), is measured for both single and multiple fault predictions.

Rapid adoption of AI technologies raises several major security concerns, including the risks of adversarial perturbations, which threaten the confidentiality and integrity of AI applications. Protecting AI hardware from misuse and diverse security threats is a challenging task. To address this challenge, we propose SAMURAI, a novel framework for safeguarding against malicious usage of AI hardware and its resilience to attacks. SAMURAI introduces an AI Performance Counter (APC) for tracking dynamic behavior of an AI model coupled with an on-chip Machine Learning (ML) analysis engine, known as TANTO (Trained Anomaly Inspection Through Trace Observation). APC records the runtime profile of the low-level hardware events of different AI operations. Subsequently, the summary information recorded by the APC is processed by TANTO to efficiently identify potential security breaches and ensure secure, responsible use of AI. SAMURAI enables real-time detection of security threats and misuse without relying on traditional software-based solutions that require model integration.Experimental results demonstrate that SAMURAI achieves up to 97% accuracy in detecting adversarial attacks with moderate overhead on various AI models, significantly outperforming conventional software-based approaches. It enhances security and regulatory compliance, providing a comprehensive solution for safeguarding AI against emergent threats.

The capability of artificial intelligence (AI), increasingly embedded in critical domains, faces a complex array of security threats. It has motivated researchers to explore the security vulnerability of AI solutions and propose effective countermeasures. This article offers a comprehensive exploration of diverse attacks on AI models, including backdoors (Trojans), adversarial, fault injection, data poisoning, model inversion, model extraction, membership inference attacks, etc. These security vulnerabilities are classified into two broad categories, namely, Supply Chain Attacks and Runtime Attacks. We highlight threat models, attack strategies, and defenses to secure AI systems against these attacks. The work also underscores the significance of developing secure and robust AI models and their implementation to safeguard sensitive data and embedded systems. We present some emerging research directions on secure AI systems.

Maintaining certain physical activity levels is important to prevent or delay the onset of many medical conditions such as diabetes, or mental health disorders. Traditional calorie estimation methods require wearing devices, such as pedometers, smart watches or smart bracelets, which continuously monitor user activity and estimate the energy expenditure. However, wearable devices may not be suitable for some patients due to the need for periodic maintenance, frequent recharging and having to wear it all the time. In this paper we investigate a feasibility of a device-free human energy expenditure estimation based on RF-sensing, which recognises coarse-grained user activity, such as walking, standing, sitting or resting by monitoring the impact of a person's activity on ambient wireless links. The calorie estimation is then based on Metabolic Equivalent concept that expresses the energy cost of an activity as a multiple of a person's basal metabolic rate using Harrison-Benedict model. The experimental evaluation using low cost IEEE 802.15.4 transceivers demonstrated that the approach estimated energy expenditure within an indoor environment within 7.4% to 41.2% range when compared to a FitBit Blaze bracelet.