Demo Data from EDBT 2026 / reviewers in the wild / expert
Vikram Chandrasekhar
dblp:26/5256
· DBLP profile ↗
18ranked-venue papers
9as first author
0since 2021 · last 2020
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 9 · 7 first-authorSystems, architecture and hardware · 7 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 1 first-authorArtificial intelligence and machine learning · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
2 papers |
Cellular and mobile networks · 56% Physical-layer communications · 36% Network optimization and economics · 8% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 60% Reconfigurable computing and FPGAs · 30% Hardware reliability and fault tolerance · 9% | |
| Artificial intelligence
1 paper |
Deep learning architectures and training · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 16 heaviest of 16, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Cellular and mobile networks
5g |
0.4 | 1 | 2020 | Deep Reservoir Computing Meets 5G MIMO-OFDM Systems in Symbol Detection · AAAI 2020 |
Physical-layer communications › signal detection › MIMO detection
MIMO-OFDM detection |
0.4 | 1 | 2020 | Deep Reservoir Computing Meets 5G MIMO-OFDM Systems in Symbol Detection · AAAI 2020 |
Machine learning › Deep learning architectures and training › recurrent neural network
reservoir computing |
0.1 | 1 | 2020 | Deep Reservoir Computing Meets 5G MIMO-OFDM Systems in Symbol Detection · AAAI 2020 |
Cellular and mobile networks › small cell networks
femtocell |
0.1 | 1 | 2009 | Spectrum allocation in tiered cellular networks · IEEE Trans. Commun. 2009 |
Network optimization and economics › resource allocation
spectrum allocation |
0.1 | 1 | 2009 | Spectrum allocation in tiered cellular networks · IEEE Trans. Commun. 2009 |
Cellular and mobile networks › heterogeneous networks
two-tier cellular network |
0.1 | 1 | 2009 | Spectrum allocation in tiered cellular networks · IEEE Trans. Commun. 2009 |
Compilers and program optimization
parallelizing compiler |
0.1 | 1 | 2007 | A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs · MICRO 2007 |
Parallel and multicore computing
dynamic analysis |
0.1 | 1 | 2007 | A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs · MICRO 2007 |
Parallel and multicore computing
parallel programming models |
0.1 | 1 | 2007 | A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs · MICRO 2007 |
Parallel and multicore computing
pipeline parallelism |
0.1 | 1 | 2007 | A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs · MICRO 2007 |
Reconfigurable computing and FPGAs › FPGA reliability
FPGA fault tolerance |
0.1 | 1 | 2005 | Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only) · FPGA 2005 |
Reconfigurable computing and FPGAs › dynamic reconfiguration
partial reconfiguration |
0.1 | 1 | 2005 | Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only) · FPGA 2005 |
Cellular and mobile networks › interference management
cross-tier interference |
0.0 | 1 | 2009 | Spectrum allocation in tiered cellular networks · IEEE Trans. Commun. 2009 |
Cellular and mobile networks
interference management |
0.0 | 1 | 2009 | Spectrum allocation in tiered cellular networks · IEEE Trans. Commun. 2009 |
Hardware reliability and fault tolerance › soft errors
single-event upset |
0.0 | 1 | 2005 | Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only) · FPGA 2005 |
Hardware reliability and fault tolerance
soft errors |
0.0 | 1 | 2005 | Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only) · FPGA 2005 |
Methods — techniques the papers use, named apart from their topics
recurrent neural network · 0.9joint time-frequency processing · 0.9deep reservoir computing · 0.9stream graph extraction · 0.1dynamic analysis · 0.1convex optimization · 0.1program annotations · 0.1program annotation · 0.1shift register error propagation · 0.1partial reconfiguration · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Deep Reservoir Computing Meets 5G MIMO-OFDM Systems in Symbol DetectionabstractConventional reservoir computing (RC) is a shallow recurrent neural network (RNN) with fixed high dimensional hidden dynamics and one trainable output layer. It has the nice feature of requiring limited training which is critical for certain applications where training data is extremely limited and costly to obtain. In this paper, we consider two ways to extend the shallow architecture to deep RC to improve the performance without sacrificing the underlying benefit: (1) Extend the output layer to a three layer structure which promotes a joint time-frequency processing to neuron states; (2) Sequentially stack RCs to form a deep neural network. Using the new structure of the deep RC we redesign the physical layer receiver for multiple-input multiple-output with orthogonal frequency division multiplexing (MIMO-OFDM) signals since MIMO-OFDM is a key enabling technology in the 5th generation (5G) cellular network. The combination of RNN dynamics and the time-frequency structure of MIMO-OFDM signals allows deep RC to handle miscellaneous interference in nonlinear MIMO-OFDM channels to achieve improved performance compared to existing techniques. Meanwhile, rather than deep feedforward neural networks which rely on a massive amount of training, our introduced deep RC framework can provide a decent generalization performance using the same amount of pilots as conventional model-based methods in 5G systems. Numerical experiments show that the deep RC based receiver can offer a faster learning convergence and effectively mitigate unknown non-linear radio frequency (RF) distortion yielding twenty percent gain in terms of bit error rate (BER) over the shallow RC structure. Zhou Zhou 0002, Lingjia Liu 0001, Vikram Chandrasekhar, Jianzhong Zhang 0002, Yang Yi 0002 |
AAAI | 3 |
| 2010 | Femtocell Access Control in the TDMA/OFDMA UplinkabstractThis paper investigates open vs. closed access in the uplink of femtocell networks, for the particular case of orthogonal multiple access protocols like TDMA or OFDMA. Open access reduces near-far interference and provides an inexpensive way to expand the capacity of the operator's network. Additionally, with a cap on the amount of resources allocated to the cellular users, open access ensures the femtocell owner still monopolizes a large portion of the femtocell's capacity and backhaul. Seemingly open access is the appropriate approach for both two parties. We show mathematically and through simulations that the reality is more complicated and depends heavily on cellular user density: for example, closed access is typically preferable at high user densities in orthogonal multiple access. The results of this paper suggest that OFDMA or TDMA femtocells should adapt their access mechanism to the average cellular user density, which changes slowly. Ping Xia, Vikram Chandrasekhar, Jeffrey G. Andrews |
GLOBECOM | 2 |
| 2010 | Open vs. Closed Access Femtocells in the UplinkabstractFemtocells are assuming an increasingly important role in the coverage and capacity of cellular networks. In contrast to existing cellular systems, femtocells are end-user deployed and controlled, randomly located, and rely on third party backhaul (e.g. DSL or cable modem). Femtocells can be configured to be either open access or closed access. Open access allows an arbitrary nearby cellular user to use the femtocell, whereas closed access restricts the use of the femtocell to users explicitly approved by the owner. Seemingly, the network operator would prefer an open access deployment since this provides an inexpensive way to expand their network capabilities, whereas the femtocell owner would prefer closed access, in order to keep the femtocell's capacity and backhaul to himself. We show mathematically and through simulations that the reality is more complicated for both parties, and that the best approach depends heavily on whether the multiple access scheme is orthogonal (TDMA or OFDMA, per subband) or non-orthogonal (CDMA). In a TDMA/OFDMA network, closed-access is typically preferable at high user densities, whereas in CDMA, open access can provide gains of more than 300% for the home user by reducing the near-far problem experienced by the femtocell. The results of this paper suggest that the interests of the femtocell owner and the network operator are more compatible than typically believed, and that CDMA femtocells should be configured for open access whereas OFDMA or TDMA femtocells should adapt to the cellular user density. Ping Xia, Vikram Chandrasekhar, Jeffrey G. Andrews |
IEEE Trans. Wirel. Commun. | 2 |
| 2009 | Distributed Power Control in Femtocell-Underlay Cellular NetworksabstractIn a two tier cellular network comprised of a central macrocell underlaid with shorter range femtocell hotspots cross-tier interference limits overall capacity with universal frequency reuse. To quantify near-far effects, this paper derives a fundamental relation providing the largest feasible cellular signal-to-interference plus noise ratio (SINR), given any set of feasible femtocell SINRs. A distributed utility-based SINR adaptation at femtocells is proposed in order to alleviate cross-tier interference at the macrocell. The Foschini-Miljanic (FM) algorithm is a special case of the adaptation. Each femtocell maximizes their individual utility consisting of a SINR based reward less an incurred cost (cross-tier interference). Results show greater than 30% improvement in mean femtocell SINRs relative to FM. An algorithm is proposed that adaptively curtails transmission powers of the strongest femtocell interferers. Simulations show that a cell-edge user can achieve its SINR target even with 100 femtocells/cell-site (with typical cellular parameters). Vikram Chandrasekhar, Jeffrey G. Andrews, Zukang Shen, Tarik Muharemovic, Alan Gatherer |
GLOBECOM | 1 |
| 2009 | Coverage in Tiered Cellular Networks with Spatial DiversityabstractIn two-tier networks - comprising a conventional cellular network overlaid with shorter range femtocell hotspots - with universal frequency reuse, the near-far effect from crosstier interference diminishes coverage for users in either tier. Equipping the macrocell and femtocell basestations (BSs) with multiple antennas can enhance robustness against the near-far problem. Given a per-tier outage probability constraint, this work derives coverage radii wherein cross-tier interference bottlenecks cellular and hotspot coverage. Single-user (SU) multiple antenna transmission at each tier is shown to provide significantly superior coverage and spatial reuse relative to multiuser (MU) transmission. We propose a decentralized carrier sensing approach to regulate femtocell transmission powers for ensuring reliable cellular coverage. Simulations using typical path loss scenarios show that our interference management strategy provides reliable cellular coverage with about 60 femtocells per cellsite. Vikram Chandrasekhar, Marios Kountouris, Jeffrey G. Andrews |
GLOBECOM | 1 |
| 2009 | Spectrum allocation in tiered cellular networksabstractTwo-tier networks, comprising a conventional cellular network overlaid with shorter range hotspots (e.g. femtocells, distributed antennas, or wired relays), offer an economically viable way to improve cellular system capacity. The capacity-limiting factor in such networks is interference. The cross-tier interference between macrocells and femtocells can suffocate the capacity due to the near-far problem, so in practice hotspots should use a different frequency channel than the potentially nearby high-power macrocell users. Centralized or coordinated frequency planning, which is difficult and inefficient even in conventional cellular networks, is all but impossible in a two-tier network. This paper proposes and analyzes an optimum decentralized spectrum allocation policy for two-tier networks that employ frequency division multiple access (including OFDMA). The proposed allocation is optimal in terms of area spectral efficiency (ASE), and is subjected to a sensible quality of service (QoS) requirement, which guarantees that both macrocell and femtocell users attain at least a prescribed data rate. Results show the dependence of this allocation on the QoS requirement, hotspot density and the co-channel interference from the macrocell and femtocells. Design interpretations are provided. Vikram Chandrasekhar, Jeffrey G. Andrews |
IEEE Trans. Commun. | 1 |
| 2009 | Uplink capacity and interference avoidance for two-tier femtocell networksabstractTwo-tier femtocell networks- comprising a conventional cellular network plus embedded femtocell hotspots- offer an economically viable solution to achieving high cellular user capacity and improved coverage. With universal frequency reuse and DS-CDMA transmission however, the ensuing cross-tier interference causes unacceptable outage probability. This paper develops an uplink capacity analysis and interference avoidance strategy in such a two-tier CDMA network. We evaluate a network-wide area spectral efficiency metric called the operating contour (OC) defined as the feasible combinations of the average number of active macrocell users and femtocell base stations (BS) per cell-site that satisfy a target outage constraint. The capacity analysis provides an accurate characterization of the uplink outage probability, accounting for power control, path loss and shadowing effects. Considering worst case interference at a corner femtocell, results reveal that interference avoidance through a time-hopped CDMA physical layer and sectorized antennas allows about a 7x higher femtocell density, relative to a split spectrum two-tier network with omnidirectional femtocell antennas. A femtocell exclusion region and a tier selection based handoff policy offers modest improvements in the OCs. These results provide guidelines for the design of robust shared spectrum two-tier networks. Vikram Chandrasekhar, Jeffrey G. Andrews |
IEEE Trans. Wirel. Commun. | 1 |
| 2009 | Power Control in Two-Tier Femtocell NetworksabstractIn a two tier cellular network - comprised of a central macrocell underlaid with shorter range femtocell hotspots - cross-tier interference limits overall capacity with universal frequency reuse. To quantify near-far effects with universal frequency reuse, this paper derives a fundamental relation providing the largest feasible cellular Signal-to-Interference-Plus-Noise Ratio (SINR), given any set of feasible femtocell SINRs. We provide a link budget analysis which enables simple and accurate performance insights in a two-tier network. A distributed utility- based SINR adaptation at femtocells is proposed in order to alleviate cross-tier interference at the macrocell from cochannel femtocells. The Foschini-Miljanic (FM) algorithm is a special case of the adaptation. Each femtocell maximizes their individual utility consisting of a SINR based reward less an incurred cost (interference to the macrocell). Numerical results show greater than 30% improvement in mean femtocell SINRs relative to FM. In the event that cross-tier interference prevents a cellular user from obtaining its SINR target, an algorithm is proposed that reduces transmission powers of the strongest femtocell interferers. The algorithm ensures that a cellular user achieves its SINR target even with 100 femtocells/cell-site (with typical cellular parameters) and requires a worst case SINR reduction of only 16% at femtocells. These results motivate design of power control schemes requiring minimal network overhead in two-tier networks with shared spectrum. Vikram Chandrasekhar, Jeffrey G. Andrews, Tarik Muharemovic, Zukang Shen, Alan Gatherer |
IEEE Trans. Wirel. Commun. | 1 |
| 2009 | Coverage in multi-antenna two-tier networksabstractIn two-tier networks comprising a conventional cellular network overlaid with shorter range hotspots (e.g. femtocells, distributed antennas, or wired relays) with universal frequency reuse, the near-far effect from cross-tier interference creates dead spots where reliable coverage cannot be guaranteed to users in either tier. Equipping the macrocell and femtocells with multiple antennas enhances robustness against the near-far problem. This work derives the maximum number of simultaneously transmitting multiple antenna femtocells meeting a per-tier outage probability constraint. Coverage dead zones are presented wherein cross-tier interference bottlenecks cellular and femtocell coverage. Two operating regimes are shown namely 1) a cellular-limited regime in which femtocell users experience unacceptable cross-tier interference and 2) a hotspot-limited regime wherein both femtocell users and cellular users are limited by hotspot interference. Our analysis accounts for the per-tier transmit powers, the number of transmit antennas (single antenna transmission being a special case) and terrestrial propagation such as the Rayleigh fading and the path loss exponents. Single-user (SU) multiple antenna transmission at each tier is shown to provide significantly superior coverage and spatial reuse relative to multiuser (MU) transmission. We propose a decentralized carrier-sensing approach to regulate femtocell transmission powers based on their location. Considering a worst-case cell-edge location, simulations using typical path loss scenarios show that our interference management strategy provides reliable cellular coverage with about 60 femtocells per cell-site. Vikram Chandrasekhar, Marios Kountouris, Jeffrey G. Andrews |
IEEE Trans. Wirel. Commun. | 1 |
| 2008 | Optimal power allocation for sum capacity of a slotted three-cell systemabstractSubstantial gains are realizable through basestation cooperation during assignment of transmission powers to users. While binary power assignment is optimal for sum capacity in a two-cell system, it does not hold true in general for multi-cell systems. In this paper, we study an optimal power allocation for sum capacity in a three-cell system. The proposed branching algorithm is of linear computational complexity, and provides a power assignment which achieves a sum capacity arbitrarily close to the theoretical value. This result provides the impetus for next generation wireless systems to enable basestations to perform joint power assignment across multiple cells. Vikram Chandrasekhar, Zukang Shen, Vijay Sundararajan |
ICASSP | 1 |
| 2007 | Uplink Capacity and Interference Avoidance for Two-Tier Cellular NetworksabstractTwo-tier femtocell networks-comprising a conventional macrocellular network plus embedded femtocell hotspots- offer an economically viable solution to achieving high cellular user capacity and improved coverage. This paper develops an uplink capacity analysis and interference avoidance strategy in such a two-tier CDMA network with universal frequency reuse. We evaluate a network-wide area spectral efficiency metric called the Operating Contour (OC) defined as the combinations of the average macrocell users and femtocell BS per cell-site that meet a target outage constraint. A contribution of this work is an accurate characterization of the uplink outage probability taking cross-tier power control, path-loss and shadowing into account. Considering worst case interference at a corner femtocell, results reveal that interference avoidance through a time-hopped CDMA physical layer and sectorized antennas allows about a 7x higher femtocell BS density, relative to a split spectrum network with omnidirectional femtocell antennas. These results provide guidelines for the design of robust shared spectrum two-tier networks. Vikram Chandrasekhar, Jeffrey G. Andrews |
GLOBECOM | 1 |
| 2007 | A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C ProgramsabstractThe emergence of multicore processors has heightened the need for effective parallel programming practices. In addition to writing new parallel programs, the next generation of programmers will be faced with the overwhelming task of migrating decades' worth of legacy C code into a parallel representation. Addressing this problem requires a toolset of parallel programming primitives that can broadly apply to both new and existing programs. While tools such as threads and OpenMP allow programmers to express task and data parallelism, support for pipeline parallelism is distinctly lacking. In this paper, we offer a new and pragmatic approach to leveraging coarse-grained pipeline parallelism in C programs. We target the domain of streaming applications, such as audio, video, and digital signal processing, which exhibit regular flows of data. To exploit pipeline parallelism, we equip the programmer with a simple set of annotations (indicating pipeline boundaries) and a dynamic analysis that tracks all communication across those boundaries. Our analysis outputs a stream graph of the application as well as a set of macros for parallelizing the program and communicating the data needed. We apply our methodology to six case studies, including MPEG-2 decoding, MP3 decoding, GMTI radar processing, and three SPEC benchmarks. Our analysis extracts a useful block diagram for each application, and the parallelized versions offer a 2.78x mean speedup on a 4-core machine. William Thies, Vikram Chandrasekhar, Saman P. Amarasinghe |
MICRO | 2 |
| 2005 | A novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAsabstractThe main objective of the technique presented in this paper is to exploit the relations between a set of Boolean functions so as to generate one function from another. The paper defines a relation termed as split-equivalence between logical functions. Using this relation, a single Look-Up Table (LUT) storing the truth table of a function F may be used to generate other functions that are split-equivalent to F resulting in an overall reduction in the Logic Area used to map the circuit on the FPGA. This paper proposes a new Configurable Logic Block (CLB) architecture containing a single LUT that stores the truth table of a Boolean function F and is capable of generating three split-equivalent functions of F. Given a set of Boolean functions to be mapped onto LUTs, the technique proposed identifies sets of four functions such that any three of them are split-equivalent to the fourth. These sets are mapped on to the proposed CLB architecture. The proposed CLB architecture was compared with the standard CLBs available on Xilinx Virtex architecture and it was found that the former occupies 26% lesser area than the latter with a small increase in the SRAM configuration bits required to configure a CLB. Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001 |
ASP-DAC | 2 |
| 2005 | A function generator-based reconfigurable systemabstractThis paper proposes a new reconfigurable system which has a function generator-based CLB architecture. This is different from the standard look-up table (LUT) based CLB architectures available in commercial FPGAs. The new function generation architecture is based on the fact that a small set of k-input Boolean functions can generate all the 22k, k-input Boolean functions using a simple mapping technique. The area required by the new function generation architecture is 58.6% lesser than the area required by a standard 16 x 1 LUT used in commercial FPGAs. In addition, the proposed architecture consumes 40.8% lesser power than the standard 16 x 1 LUT. The routing architecture for the proposed reconfigurable system is the same as those present in current-day FPGAs. Hence, the algorithms presently used for technology mapping, packing, placement and routing on FPGAs can be used for the proposed reconfigurable system without much modification. The new architecture requires a 10% increase in the SRAM configuration memory. This is an insignificant penalty in comparison to the reduction in the area of the FPGA and power consumption, achieved by the proposed CLB architecture. Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001 |
ASP-DAC | 2 |
| 2005 | Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAsabstractThis paper proposes a cluster-based parity-checking technique that can detect 100% of all Single Event Upset (SEU) faults in the LUTs of SRAM-based FPGAs. The paper describes two different Configurable Logic Block (CLB) architectures that could be used to implement the proposed SEU detection technique. Of the two, the first architecture can perform at-speed testing of the LUTs without interrupting the normal functioning of the FPGA. The second one works by switching the CLBs from normal-mode to testing-mode and vice-versa. The LUTs are tested in the testing-mode. The switching frequency can be externally programmed and hence varied depending on the rate of SEU occurrences. Both the proposed architectures were compared with the Xilinx Virtex and Virtex Pro architecture. The proposed architectures require only 2 (when compared with Virtex) and 4 (when compared with Virtex Pro) additional SRAM configuration bits per LUT. This is extremely low when compared to the 16 additional SRAM configuration bits required by CLB architectures used to implement standard DWC techniques for detecting SEUs in LUTs. The area requirements of both the proposed architectures are also significantly less than the area requirements of DWC techniques. The proposed detection technique requires only 3 clock cycles of the Xilinx Virtex internal clock to detect the effect of an SEU in any LUT of the FPGA. E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001, Narayanan Vijaykrishnan |
ASP-DAC | 2 |
| 2005 | Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only)abstractThis paper proposes a new CLB architecture for FPGAs and associated testing and reconfiguration techniques that detect single routing/interconnect errors and correct them using partial reconfiguration. The results of error detection are propagated to a single output port by a chain-like shift register, which are used to reduce the segment of the routing architecture that has to be reconfigured. The error is corrected by partially reconfiguring the above minimal segment alone, thereby reducing the time for reconfiguration. The proposed testing technique detects all possible routing errors that affects the logic of the circuit, including bridging faults. It is noteworthy that the time required for error detection is independent of both the number of switch matrices and the number of logic blocks in the FPGA. Empirically, our technique detected all single interconnect errors in benchmark circuits. In addition, for the majority of errors, our correction technique required less than 10% of the switch matrices to be reconfigured to correct the errors. E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001, Narayanan Vijaykrishnan |
FPGA | 2 |
| 2004 | A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAsabstractThis work proposes a new CLB architecture for FPGAs that can detect and correct single event upset (SEU) faults in the LUTs. A methodology for mapping logical functions onto the LUTs is presented that exploits the features of the proposed CLB architecture to detect and correct the SEU faults in the LUTs. Experimental results obtained by mapping standard benchmark circuits on the proposed architecture indicate that on an average, 96% of the SEU in the LUTs can be detected without employing any redundancy. Further, by using duplication with comparison (DWC) techniques it is shown that 100% of the SEU in the LUTs can be detected for any circuit that is mapped on the proposed architecture; and for the benchmark circuits, on an average, 96% of the SEU in the LUTs can be automatically (without any user intervention or reconfiguration) corrected. E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001, Narayanan Vijaykrishnan |
FPT | 2 |
| 2003 | Reducing dynamic power consumption in next generation DS-CDMA mobile communication receiversabstractReduction of the power consumption in portable wireless receivers is an important consideration for next-generation cellular systems specified by standards such as the UMTS, IMT2000. We explore the architectural design-space and methodologies for reducing the dynamic power dissipation in the direct sequence code division multiple access (DS-CDMA) downlink RAKE receiver. Starting with a reference implementation of the DS-CDMA RAKE receiver, we demonstrate design methodologies for achieving significant power reduction, while highlighting the corresponding performance trade-offs. At the algorithm level, we investigate the tradeoffs of reduced precision and arithmetic complexity on the receiver performance. We then present two architectures for implementing the reference and reduced complexity receivers, and analyze these architectures with respect to their dynamic power dissipation. Our findings report that reduction in precision from a 16 bit to a 10 bit data-path is found to yield significant power savings of 25.6% in the reference RAKE receiver architecture, with a performance loss of less than 1 dB. Further, a power reduction of up to 24.65% is achieved in a 16 bit data-path for the reduced complexity RAKE receiver compared to the reference architecture, with a performance loss of less than 2 dB. Although there is a tradeoff in performance, adaptive power saving is very important for mobile wireless terminals. The combined effect of reduced precision and complexity reduction leads to a 37.44% savings in baseband processing power. Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro |
ASAP | 1 |