In this paper, a class of product codes based on low-density parity check (LDPC) constituent codes are constructed for multiple phased-burst erasure correction (MPBEC). These codes are shown to correct one large burst and/or a number of shorter bursts. A simple novel recursive erasure correction algorithm is proposed based on a recently discovered zero-span approach to linear block code analysis that can produce very powerful MPBEC capabilities. Analysis and data on how these codes work for additive white Gaussian noise (AWGN) channel are also presented.

An error-burst correcting algorithm is developed based on a circulant parity-check matrix of a cyclic code. The proposed algorithm is more efficient than error trapping if the code rate is less than about 2/3. It is shown that for any (n, k) cyclic code, there is an n × n circulant parity-check matrix such that the algorithm, applied to this matrix, corrects error bursts of lengths up to the error-burst correction limit of the cyclic code. This same matrix can be used to efficiently correct erasure bursts of lengths up to n - k. The error-burst correction capabilities of a class of cyclic low-density parity-check (LDPC) codes constructed from finite geometries are also considered.

Quasi-cyclic (QC) low-density parity-check (LDPC) codes form an important subclass of LDPC codes. These codes have encoding advantage over other types of LDPC codes. This paper addresses the issue of efficient encoding of QC-LDPC codes. Two methods are presented to find the generator matrices of QC-LDPC codes in systematic-circulant (SC) form from their parity-check matrices, given in circulant form. Based on the SC form of the generator matrix of a QC-LDPC code, various types of encoding circuits using simple shift registers are devised. It is shown that the encoding complexity of a QC-LDPC code is linearly proportional to the number of parity bits of the code for serial encoding, and to the length of the code for high-speed parallel encoding.

This paper presents methods for efficient encoding of quasi-cyclic LDPC codes. Based on these methods, encoding of quasi-cyclic LDPC codes can be implemented using simple shift-registers with complexity linearly proportional to the number of parity-check bits of a code for serial encoding and to the length of a code for parallel encoding. Various encoding circuits are devised and they provide a range of trade-offs between encoding complexity and speed.

Efficient Encoding of Quasi-Cyclic Low-Density Parity-Check Codes Quasi-cyclic (QC) low-density parity-check (LDPC) codes form an important subclass of LDPC codes. These codes have encoding advantage over other types of LDPC codes. This paper addresses the issue of efficient encoding of QC-LDPC codes. Two methods are presented to find the generator matrices of QC-LDPC codes in systematic-circulant form from their parity-check matrices given in circulant form. Based on the systematic-circulation form of the generator matrix of a QC-LDPC code, various types of encoding circuits using simple shift registers are devised. It is shown that the encoding complexity of a QC-LDPC code is linearly proportional to the number of parity bits of the code for serial encoding, and to the length of the code for high-speed parallel encoding.