Kazuhiro Tsuchiya

dblp:26/6215 · DBLP profile ↗
← Back
4ranked-venue papers
3as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 3 · 2 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.011996
A neural network approach to PLA folding problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › logic synthesis › logic optimization
PLA folding
0.011996
A neural network approach to PLA folding problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996

Methods — techniques the papers use, named apart from their topics

parallel algorithm · 0.0maximum neural network · 0.0
YearPublicationVenuePosition
1999 Microcode optimization with neural networks
abstract
Microcode optimization is an NP-complete combinatorial optimization problem. This paper proposes a new method based on the Hopfield neural network for optimizing the wordwidth in the control memory of a microprogrammed digital computer. We present two methodologies, viz., the maximum clique approach, and a cost function based method to minimize an objective function. The maximum clique approach albeit being near O(1) in complexity, is limited in its use for small problem sizes, since it only partitions the data based on the compatibility between the microoperations, and does not minimize the cost function. We thereby use this approach to condition the data initially (to form compatibility classes), and then use the proposed second method to optimize on the cost function. The latter method is then able to discover better solutions than other schemes for the benchmark data set.
Sunil Bharitkar, Kazuhiro Tsuchiya, Yoshiyasu Takefuji
IEEE Trans. Neural Networks2
1997 A Neural Network Parallel Algorithm for Meeting Schedule Problems
Kazuhiro Tsuchiya, Yoshiyasu Takefuji
Appl. Intell.1
1996 A neural network approach to PLA folding problems
abstract
A near-optimum parallel algorithm for solving PLA folding problems is presented in this paper where the problem is NP-complete and one of the most fundamental problems in VLSI design. The proposed system is composed of n/spl times/n neurons based on an artificial two-dimensional maximum neural network where n is the number of inputs and outputs or the number of product lines of PLA. The two-dimensional maximum neurons generate the permutation of inputs and outputs or product lines. Our algorithm can solve not only a simple folding problem but also multiple, bipartite, and constrained folding problems. We have discovered improved solutions in four benchmark problems over the best existing algorithms using the proposed algorithm.
Kazuhiro Tsuchiya, Yoshiyasu Takefuji
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1995 A neural network algorithm for the no-three-in-line problem
Kazuhiro Tsuchiya, Yoshiyasu Takefuji
Neurocomputing1