This paper presents a power quality evaluation of the Class-D high-frequency power amplifier/inverter. The real, reactive, complex, apparent, distortion, and non-active powers at the input of the resonant circuit are derived and illustrated as functions of frequency. Also, the total harmonic distortion and power factor are determined. Similar analysis of the power quality at the dc input of the amplifier is given. Experimental results are given to verify the theory. It is shown that the input current of the Class-D inverter contains a significant ac component that does not contribute to the real dc input power, resulting in high distortion power, high total harmonic distortion, and poor power factor. The Class-D inverter was designed, built and tested to verify the theory.

Simultaneous wireless power and data transfer (SWPDT) is a technology that enables the transfer of electrical power and data signals at the same time. Since the transfer is performed through the same physical link, particular attention must be placed on the frequency response and mutual influence between data and power channels. Although several studies have been proposed for SWPDT modeling applied to electric vehicles (EV), an extensive analysis of the influence of misalignment on the frequency response of the data channels is lacking in the literature. This article investigates the robustness to misalignment of the data channel using two main resonant topologies, such as those based on series–series (SS) andLCC–LCCcompensation circuits. The analytical model of the data channel is derived for both topologies and the performances are evaluated in two lab prototypes using the misalignment scenarios described in the SAE J2954 standard. Variables, such as efficiency, signal-to-noise ratio (SNR), and capacity of the data channel have been analyzed. Similarly, attention has been paid to backward data transmission, which is of interest for vehicle-to-grid chargers. The obtained results in each analysis show that the data channel inLCC–LCCtopology has a more stable and symmetrical performance.

This paper presents an analysis of an LCR second-order low-pass filter capacitor to achieve a specified ripple output voltage in Buck, forward, Zeta, and Ćuk PWM DC-DC power converters for continuous-conduction mode (CCM). Current and voltage waveforms across output filter components are derived. Using the waveform of the ac component of the output voltage, an expression for the ripple voltage is developed in terms of the filter capacitance and equivalent series resistance. The results can be used for all PWM converters with the LCR output filter, such as Buck, forward, Zeta, and Ćuk PWM DC-DC converters. Theoretical results were in good agreement with simulation and experimental results.

In this paper, an averaged nonlinear model of a bridgeless single-switch non-inverting ac-dc Cuk converter in DCM is derived. In addition, a current-mode control scheme is designed to operate the power converter in buck and boost modes during line and load variations. In contrast, the previous research endeavors of the bridgeless Cuk converter presented a single operation mode, and accommodation of large disturbances has not been discussed. The proposed control method is compared with the classical PI controller to investigate their performance. MATLAB simulation results show that the proposed control scheme improves the dynamical response, tracks the reference voltage, and provides wide operating range.

In this paper, an LCC-S compensated wireless power transfer system regulated by a variable inductor is presented. The inductance variation is performed by exploiting the magnetic material saturation of the inductor core, regulating the DC bias. The magnetic design of the controlled variable inductor is proposed. A low-cost auxiliary circuit for the regulation of the bias current is proposed, and the performance is evaluated. The effect of the inductance variation on the output power regulation and conversion efficiency are evaluated through an experimental setup.

A model-based strategy for an efficient power supply control used in a wireless sensor network is presented. The strategy, based on Pulse-Skipping Modulation, regulates the current charging a battery, delivered by a photovoltaic source, resulting in an accurate current regulation and highly efficient power management. The strategy is implemented on a microcontroller unit and compensates for the microcontroller self-absorbed current. The modulation signal is generated through a full software interface, reducing the requirement for external components. Experimental validations, performed on a charger prototype by using a laboratory photovoltaic device simulator, proved that both regulation accuracy, regulation resolution and converter efficiency achieved are superior to the classic Pulse-Width Modulation. The approach results in a simple practical implementation, carries over the advantages of an up-to-date model for the photovoltaic device, and serves the auxiliary purpose of using the photovoltaic source as an instantaneous solar irradiance sensor.

A Wireless Power Transfer System (WPTS) is basically constituted by two main parts: the primary side and the secondary side. Beyond the application related with the power transfer, also data communication between these two sides can be implemented and it can have a fundamental importance. In this paper, a classification that highlights the advantages and the disadvantages of different data communication techniques available in the literature is shown. The single link dual carrier (SLDC) technique is studied in depth, analysing transfer function of the power and data transmitting channels. A design example for electric vehicle wireless charging application in a Series-Series (SS) compensated system is presented. The analytical models are validated through simulations.

This paper presents a novel means of controlling a dynamic power supply in continuous conduction mode via sliding-mode voltage control technique. Previous work has discussed the design and implementation of a high-efficiency dynamic power supply based on an asynchronous buck converter in open-loop operation. This work incorporates nonlinear control design for the dynamic buck converter that suits applications such as envelope tracking and amplitude modulation for Class E power amplifiers. The control system is shown, via MATLAB simulation, to accurately track time-varying reference signals, improve the power converter dynamics, and provide the desired output power while rejecting large load disturbances.

LLC resonant converters offer high efficiency at high frequencies because of their ability to achieve Zero Voltage Switching (ZVS) or Zero Current Switching (ZCS). However, they require a variable frequency control, which generates a wide range of harmonics and causes electromagnetic compatibility issues. The frequency control reduces the converter efficiency at lighter loads and fails to maintain monotonicity of the control power to output transfer function. These limitations are dramatically improved by phase shift modulation (PSM) technique, which is studied in this paper. PSM controlled technique in full-bridge converter, not only improve the monotonicity of the power supply control to output transfer function, but also improves the power supply efficiency at light loads. A systematic analysis and characteristics of a PSM LLC resonant converter is proposed in this paper along with a comparison with conventional frequency modulated (FM) controlled LLC converter. The simulated PSM controlled LLC topology exhibited a maximum peak efficiency of 97.47%. At lighter load conditions, it records an efficiency of 91.66% while the FM controlled converter recorded only 82.8 %. In addition, PSM has a better control of leakage, magnetizing, and resonant currents, which results in a superior behavior than conventional FM converters.

In this paper, a nonlinear approach to modeling DC-DC PWM converters in continuous conduction mode (CCM) is presented. Specifically, a converter nonlinear model is implemented in MATLAB and SIMULINK for both the case without parasitic components (ideal case) and with parasitic components (non-ideal case). The implementation, which is based on the analytical computation of the periodic solutions in the high frequency steady-state operating condition, makes it possible to perform a systematic analysis of the dynamical behavior induced by the various perturbation sources acting on the converters. A comparison of the dynamics generated in the ideal and nonideal cases by step changes in duty cycle, input voltage and load resistance is reported for both the boost and buck converters.

DC-DC pulse-width modulated (PWM) converters are nonlinear systems that require control circuits to obtain the desired output voltage. These control circuits are often designed using linearized models of the converters, so modeling is a relevant topic for the design of performing closed-loop converters. In this paper, the nonlinear nature of DC-DC PWM converters operated under continuous conduction mode (CCM) is considered. It is first shown how the exact periodic solutions can be analytically computed for the nonlinear converter model in the high-frequency steady-state operating condition. Also, a nonlinear variation model, which characterizes the closed-loop dynamics, induced by perturbations of the steady state, is provided. The nonlinear models and the analytical periodic solutions are implemented in MATLAB and SIMULINK and applied to a boost converter subject to parasitic components. In particular, the behavior to step changes in duty cycle, input voltage, and load resistance are compared with the results obtained using small-signal circuit averaging techniques.

This paper presents a completely new technique developed to locate a single parametric fault in DC-DC power converters by means of time-domain measurements or simulations, following a rigorous approach. The technique is composed by three separated stages, a first one which evaluates testability and ambiguity groups of the Converter (or, more in general, the Circuit) Under Test (CUT), a second one which localizes the fault, classifying it in an appropriate Fault Class (FC) and a last one (optional) that can extract the value of the faulty component. The fabrication tolerances of the healthy components are taken into account at each stage of the method.

The PWM DC-DC boost converters are nonlinear time-variant circuits that provide a constant output voltage higher than input voltage over a wide duty-cycle range. In this paper, a large-signal non-ideal averaged model of boost converter is implemented using MATLAB s-function. In addition, voltage-mode control with type III compensator is designed to improve the system response and relative stability. The nonlinear model is validated via MATLAB and SaberRD simulations. Finally, the proposed model is used to study the tracking performance and stability of the control system under line and load disturbances.

The Currents' Physical Component (CPC) theory defines powers associated with distinctive physical phenomena and provides fundamentals for a design of reactive power compensators in single-phase and three-phase three-wire power systems under non-sinusoidal conditions. This paper presents an improvement of power flow analysis based on CPC theory for single-phase system. This improvement shows how the amplitudes of the individual inputs of instantaneous power influence through different weights in the apparent power formulation. The analysis also shows how crucial it is to define the intrinsic power, that is, the instantaneous power oscillation that does not contribute to the increase in apparent power in order to correctly evaluate the remaining instantaneous power inputs.

This paper proposes a new single-switch gate-driver circuit to drive a low-side power transistor at high frequencies with rapid turn-ON and turn-OFF transitions. The characteristics of the proposed topology include fast dynamic response, small energy storage requirements, and flexible design. Conventional gate drivers are used up to frequencies around 5 MHz and need at least two transistors. In this study, detailed description, design procedure, and power loss analysis of the proposed topology are presented. The introduced circuit exhibits fast switching speed and low gate-drive loss. Simulation and experimental results showing performance of the new topology are provided to validate the theory. The prototype of the gate driver for power transistors is designed, simulated, and tested at 20 MHz.

This paper presents a small-signal analysis of the power stage of a tapped-inductor pulse-width modulated (PWM) buck dc-dc converter, operating in continuous-conduction mode (CCM). Using the circuit averaging technique, the small-signal model of the power stage is developed. The derivation of duty cycle-to-output voltage and input-to-output voltage transfer functions are presented. An example tapped inductor buck dc-dc converter is considered. The time-domain and frequency-domain characteristics of the converter are analyzed, illustrated, and discussed. The theoretical results are validated using circuit simulations.

This paper presents the following for a full-bridge Class-DE resonant inverter operating at a fixed duty ratio: (a) steady-state analysis using first-harmonic approximation and (b) derivation of closed-form expressions for the currents, voltages, and powers. The conversion from a series-parallel resonant network to a series resonant network is presented. Imposing the zero-voltage and zero-derivative switching conditions, the expression for a shunt capacitance across the MOSFETs in the inverter bridge is derived. The closed-form expressions to calculate the values of the resonant components are presented. A practical design of a Class-DE resonant inverter supplied by a dc input voltage of 230 V, delivering an output power of 920 W, and operating at a switching frequency of 100 kHz is considered and its design methodology is included. Theoretical results are validated by Saber simulations.

This paper presents the small-signal modeling of a dual-SEPIC dc-dc converter power stage operating in continuous-conduction mode using the circuit averaging technique. The converter component parasitic resistances are taken into account. From the small-signal model, the following expressions of the converter required to design the outer voltage loop are derived: duty cycle-to-output voltage and input-to-output voltage transfer functions, input impedance, and output impedance. A design example is given and the characteristics of these transfer functions are analyzed. Simulations are performed to verify the correctness of the theoretically obtained transfer functions. The dual-SEPIC converter has four reactive components and yields transfer functions of order two. A brief discussion on this aspect is also provided.

This paper presents the following for a Class-E zero-voltage switching (ZVS) power amplifier: (a) design of the choke inductor and (b) theoretical estimation of power losses in the core and a solid round winding. The expressions required to design the core using the Area-Product (Ap) method are provided. The equations for the dc resistance, ac resistance at high frequencies, and dc and ac power losses are provided for the solid round winding. A Class-E ZVS power amplifier with practical specifications is considered. A core with air gap is selected since the choke inductor carries a dc current in addition to the ac component. The gapped core power loss density and power loss are estimated using Steinmetz empirical equation. Simulation results showing the transient analysis and Fourier analysis are given. It is shown that, for the given design, the winding power loss due to the fundamental component is dominant and that due to higher order harmonics can be neglected. In addition, it is also proven that the power loss caused by the dc current component is higher than that by the ac current component, which can be neglected.

The design of Class-E zero-voltage switching (ZVS) inverter with a loosely-coupled transformer is introduced in this paper. In the presented approach, the magnetizing and leakage inductances of the transformer are absorbed into the main circuit. The synthesis of the transformer-version of Class-E ZVS inverter into its equivalent π2a topology is presented. The π2a topology improves the range of the optimum load resistance required to achieve ZVS. An example of the Class-E inverter with dc supply voltage 10 V, output power 10 W, switching frequency 100 kHz and at a coupling coefficient of 0.77 is considered. The inverter is designed to achieve both zero-voltage switching (ZVS) and zero derivative switching (ZDS) conditions. The analytical expressions are validated through simulation results for an optimum coupling coefficient of 0.77. In view of potential misalignment between the primary and secondary coils, simulation results are provided for coupling coefficients, which are lower and higher than the optimum value. It is shown that both ZVS and ZDS can be achieved at a coupling coefficient lower than the optimum value and is not possible to achieve ZVS at a coupling coefficient higher than the optimum value. Overall efficiency of 94.3% is achieved at a coupling coefficient of 0.77, 93.4% at 0.85, and 92.12% at 0.7. The presented approach can be used for transformers with reactive load impedances also.

This paper proposes a technique to track and regulate the “true average” current in any branch of a pulse-width modulated dc-dc power converter. An example buck converter in continuous-conduction mode is considered. A comprehensive characterization is presented for the proposed scheme. An overall dc and small-signal analysis of the inner current loop is performed. The current average current-mode control methods suffer from switching instability at low duty ratios due to a large ripple in the sensed current. Moreover, the current error amplifier's high-frequency pole located at the switching frequency neither alleviates the stability issue nor improves the dynamic response of the converter. In the proposed approach, a low-pass filter, which attenuates any high-frequency ripple is placed in the feedback path of the current loop. Consequently, the control voltage is nearly dc and proportional to the actual average value of the inductor current. The inner current loop gain transfer function of the presented circuit has been derived. The following critical path closed-loop transfer functions have been derived: reference voltage-to-inductor current and reference voltage-to-output voltage. Using practical specifications of a buck dc-dc converter, a theoretical framework to design the inner loop is presented. Verification of the theoretically predicted transfer functions and transient analysis is performed through simulations.

This paper presents the derivation of the small-signal model of the boost converter operating in the boundary-conduction mode (BCM) using the circuit averaging technique. The essential transfer functions such as the input-to-output voltage transfer function Mvand the control-to-output transfer function Tpare derived using the linear small-signal model. Further, the characteristics of these transfer functions are analyzed using a representative design example. The switching circuit and the small-signal model are tested on a simulator to validate the proposed model.

A small-signal model for a PWM dc-dc boost converter operated in DCM composed of current-controlled current sources and derived by using the energy conservation approach is presented. The proposed model is suitable for small-signal, frequency-domain representation of the converter and can be used to derive the expressions and Bode plots of the control-to-output voltage transfer function. The input-to-output voltage transfer function, the input impedance, and the output impedance. Main advantages of the proposed method are as follows. A linear equivalent circuit of the converter is derived and its representation in the frequency domain given which does not require matrix manipulation. The converter parasitic components are considered. A good understanding of the frequency domain behavior of power converters is achieved. Finally, the proposed method can be easily utilized to model other PWM dc-dc converter circuits.

A symbolic approach to the frequency domain characterization of dc-dc converters is presented. The symbolic analysis is based on a sampled-data technique derived from a state variable approach, exploiting the numerical values of the state variable and output samples obtained by s-domain symbolic network functions of the circuit. A symbolic program developed by the authors is presented. It is shown that the computer symbolic analysis can be easily applied also to the averaged models of DC-DC converters. Possible developments to the frequency domain analysis of the whole DC-DC converter including the control system are also proposed.

The small-signal closed-loop input impedance is derived for the PWM buck DC-DC converter operated in continuous conduction mode (CCM), taking into account all parasitic resistances. The plots of the closed-loop input impedance are shown versus frequency for four values of the equivalent series resistance of the capacitor.>