Srijeeta Maity

dblp:262/6161 · DBLP profile ↗
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7ranked-venue papers
4as first author
7since 2021 · last 2025
0000-0003-3522-1391ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 first-author · 4 since 2021Applied, interdisciplinary, general and emerging computing · 3 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
YearPublicationVenuePosition
2025 Harnessing Machine Learning in Dynamic Thermal Management in Embedded CPU-GPU Platforms
abstract
With increasing transistor density, modern heterogeneous embedded processors often exhibit high temperature gradients due to complex application scheduling scenarios which may have missed design considerations. In many use cases, off-chip ”active” cooling solutions are considered prohibitive in such reduced form factors. Core frequency throttling by existing dynamic thermal management techniques often compromises the Quality-of-Service (QoS) and violates real-time deadlines. This necessitates the adoption of intelligent resource management that simultaneously manages both thermal and latency performance. Coupled with the complexity of modern heterogeneous multi-cores, the periodic application updates that cater to ever-changing user requirements often render model-driven thermal-aware resource allocation approaches unsuitable for heterogeneous multi-core systems. For such application-architecture scenarios, we propose a novel self-learning based resource manager using Reinforcement Learning that intelligently manipulates core frequencies and task set mappings to fulfill thermal and latency objectives. Our framework employs a data-driven system modeling technique using Gaussian Process Regression to enable efficient offline training of this learning-based resource manager to avoid challenges associated with initial online training. We evaluate the approach on a heterogeneous embedded CPU-GPU platform with real workloads and observe a significant reduction in peak operating temperature when compared to the default onboard frequency governor as well as other learning-based state-of-the-art approaches.
Srijeeta Maity, Anirban Majumder, Rudrajyoti Roy, Ashish Ranjan Hota, Soumyajit Dey
ACM Trans. Design Autom. Electr. Syst.1
2022 Work-in-Progress: Control Skipping Sequence Synthesis to Counter Schedule-based Attacks
abstract
We present an ongoing work on countermeasure design against timing attacks specific to real-time safety-critical Cyber Physical Systems (CPS). Such attacks use timing side channels exposed due to worst-case response time based deterministic scheduling decisions. We propose a methodology to partially nullify this determinism by skipping certain control task executions and related data transmissions. As a proof of concept, we demonstrate how such strategic randomization makes it difficult to launch stealthy timing attacks on controller area network (CAN) based systems.
Sunandan Adhikary, Ipsita Koley, Srijeeta Maity, Soumyajit Dey
RTSS3
2022 Future aware Dynamic Thermal Management in CPU-GPU Embedded Platforms
abstract
Modern data intensive Cyber-physical Systems ubiquitously employ heterogeneous multiprocessor systems-on chips (MPSoCs) for real-time sensing, computation, and actuation. The low foot-print of such SoCs often leads to high operating temperatures beyond acceptable limits. In this context, conventional thermal management techniques such as Operating System (OS) governed frequency scaling result in drastic degradation of the quality of experience and violation of real-time requirements. In this work, we propose an analytical thermal model for heterogeneous CPU-GPU embedded platforms and demonstrate a Model Predictive Control (MPC) based scheduling strategy with a novel heuristics-based optimization technique that leverages information about future kernels to judiciously choose suitable task mapping options for minimization of the platform's peak (or maximum) temperature to prolong chip's life span while adhering to real-time performance requirements. To the best of our knowledge, this is the first work that considers future awareness along with a variety of online task mapping control actions such as partitioning, migration, and frequency tuning in the context of thermal management in heterogeneous CPU-GPU embedded platforms. We evaluate the proposed heterogeneous framework on an Odroid-XU4 board using OpenCL based workloads and demonstrate its effectiveness in reducing the platform peak temperature.
Srijeeta Maity, Rudrajyoti Roy, Anirban Majumder, Soumyajit Dey, Ashish Ranjan Hota
RTSS1
2022 PySchedCL: Leveraging Concurrency in Heterogeneous Data-Parallel Systems
abstract
In the past decade, high performance compute capabilities exhibited by heterogeneous GPGPU platforms have led to the popularity of data parallel programming languages such as CUDA and OpenCL. Developing high performance parallel programming solutions using such languages involve a steep learning curve due to the complexity of the underlying heterogeneous compute devices and their impact on performance. This has led to the emergence of several High Performance Computing frameworks which provide high-level abstractions for easing the development of data-parallel applications on heterogeneous platforms. However, the scheduling decisions undertaken by such frameworks only exploit coarse-grained concurrency in data parallel applications. In this paper, we propose PySchedCL, a framework which explores fine-grained concurrency aware scheduling decisions that harness the power of heterogeneous CPU/GPU architectures efficiently. We showcase the efficacy of such scheduling mechanisms over existing coarse-grained dynamic scheduling schemes by conducting extensive experimental evaluations for a diverse set of popular Deep Learning benchmarks.
Anirban Ghose, Vivek Kulaharia, Lokesh Dokara, Srijeeta Maity, Soumyajit Dey
IEEE Trans. Computers5
2021 Orchestration of Perception Systems for Reliable Performance in Heterogeneous Platforms
abstract
Delivering driving comfort in this age of connected mobility is one of the primary goals of semi-autonomous perception systems increasingly being used in modern automotives. The performance of such perception systems is a function of execution rate which demands on-board platform-level support. With the advent of GPGPU compute support in automobiles, there exists an opportunity to adaptively enable higher execution rates for such Advanced Driver Assistant System tasks (ADAS tasks) subject to different vehicular driving contexts. This can be achieved through a combination of program level locality optimizations such as kernel fusion, thread coarsening and core-level DVFS techniques while keeping in mind their effects on task-level deadline requirements and platform-level thermal reliability. In this communication, we present a future-proof, learning-based adaptive scheduling framework that strives to deliver reliable and predictable performance of ADAS tasks while accommodating for increased task-level throughput requirements.
Anirban Ghose, Srijeeta Maity, Arijit Kar, Soumyajit Dey
DATE2
2021 Work-in-Progress: Cooling by Core-Idling: Thermal-Aware Thread Scheduling for Mobile Multicore Processors
abstract
Thermal efficient resource mapping and scheduling techniques are particularly important for mobile processors because of limited opportunities for external cooling. In mobile processors such as the ones using ARM’s big.LITTLE architectures, the cores of either the big or the LITTLE processor cannot be individually voltage/frequency scaled. However, we show that by forcing all the application threads to a single core, and not having any workload on the other cores of a processor, there is still considerable thermal benefit. This is counter intuitive since all the cores run at the same frequency. We show real measurements and discuss what impact this has on thermal-aware scheduling for such multicore processors.
Srijeeta Maity, Anirban Ghose, Soumyajit Dey, Sangyoung Park, Samarjit Chakraborty
RTSS1
2021 Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems
abstract
Recent trends in real-time applications have raised the demand for high-throughput embedded platforms with integrated CPU-GPU based Systems-On-Chip (SoCs). The enhanced performance of such SoCs, however, comes at the cost of increased power consumption, resulting in significant heat dissipation and high on-chip temperatures. The prolonged occurrences of high on-chip temperature can cause accelerated in-circuit ageing, which severely degrades the long-term performance and reliability of the chip. Violation of thermal constraints leads to on-board dynamic thermal management kicking-in, which may result in timing unpredictability for real-time tasks due to transient performance degradation. Recent work in adaptive software design have explored this issue from a control theoretic stand-point, striving for smooth thermal envelopes by tuning the core frequency. Existing techniques do not handle thermal violations for periodic real-time task sets in the presence of dynamic events like change of task periodicity, more so in the context of heterogeneous SoCs with integrated CPU-GPUs. This work presents an OpenCL runtime extension for thermal-aware scheduling of periodic, real-time tasks on heterogeneous multi-core platforms. Our framework mitigates dynamic thermal violations by adaptively tuning task mapping parameters, with the eventual control objective of satisfying both platform-level thermal constraints and task-level deadline constraints. We consider multiple platform-level control actions like task migration, frequency tuning and idle slot insertion as the task mapping parameters. To the best of our knowledge, this is the first work that considers such a variety of task mapping control actions in the context of heterogeneous embedded platforms. We evaluate the proposed framework on an Odroid-XU4 board using OpenCL benchmarks and demonstrate its effectiveness in reducing thermal violations.
Srijeeta Maity, Anirban Ghose, Soumyajit Dey, Swarnendu Biswas
ACM Trans. Embed. Comput. Syst.1