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Bernardo Neuhaus Lignati

dblp:263/7317 · DBLP profile ↗
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3ranked-venue papers
1as first author
2since 2021 · last 2023
0009-0006-6452-6396ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 67% Hardware reliability and fault tolerance · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › aging
aging mitigation
0.412020
Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation · DAC 2020
Reconfigurable computing and FPGAs
coarse-grained reconfigurable architecture
0.412020
Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation · DAC 2020
Reconfigurable computing and FPGAs › FPGA resource optimization
resource utilization balancing
0.412020
Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation · DAC 2020

Methods — techniques the papers use, named apart from their topics

utilization-aware allocation · 0.4
YearPublicationVenuePosition
2023 MVSym: Efficient symbiotic exploitation of HLS-kernel multi-versioning for collaborative CPU-FPGA cloud systems
Michael G. Jordan, Bernardo Neuhaus Lignati, Guilherme Korol, Mateus B. Rutzig, Antonio Carlos Schneider Beck
Integr.2
2021 Exploiting HLS-Generated Multi-Version Kernels to Improve CPU-FPGA Cloud Systems
abstract
Cloud Warehouses have been exploiting CPU-FPGA collaborative execution environments, where multiple clients share the same infrastructure to achieve to maximize resource utilization with the highest possible energy efficiency and scalability. However, the resource provisioning is challenging in these environments, since kernels may be dispatched to both CPU and FPGA concurrently in a highly variant scenario, in terms of available resources and workload characteristics. In this work, we propose MultiVers, a framework that leverages automatic HLS generation to enable further gains in such CPU-FPGA collaborative systems. MultiVers exploits the automatic generation from HLS to build libraries containing multiple versions of each incoming kernel request, greatly enlarging the available design space exploration passive of optimization by the allocation strategies in the cloud provider. Multivers makes both kernel multiversioning and allocation strategy to work symbiotically, allowing fine-tuning in terms of resource usage, performance, energy, or any combination of these parameters. We show the efficiency of MultiVers by using real-world cloud request scenarios with a diversity of benchmarks, achieving average improvements on makespan and energy of up to 4.62x and 19.04x, respectively, over traditional allocation strategies executing non-optimized kernels.
Bernardo Neuhaus Lignati, Michael G. Jordan, Guilherme Korol, Mateus B. Rutzig, Antonio Carlos Schneider Beck
ASP-DAC1
2020 Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation
abstract
Resource balancing has been effectively used to mitigate the long-term aging effects of Negative Bias Temperature Instability (NBTI) in multi-core and Graphics Processing Unit (GPU) architectures. In this work, we investigate this strategy in Coarse-Grained Reconfigurable Arrays (CGRAs) with a novel application-to-CGRA allocation approach. By introducing important extensions to the reconfiguration logic and the datapath, we enable the dynamic movement of configurations throughout the fabric and allow overutilized Functional Units (FUs) to recover from stress-induced NBTI aging. Implementing the approach in a resource-constrained state-of-the-art CGRA reveals 2.2× lifetime improvement with negligible performance overheads and less than 10% increase in area.
Marcelo Brandalero, Bernardo Neuhaus Lignati, Antonio Carlos Schneider Beck, Muhammad Shafique 0001, Michael Hübner 0001
DAC2