Demo Data from EDBT 2026 / reviewers in the wild / expert
Dylan Wright
dblp:263/7750
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 61% Emerging computing paradigms · 30% Energy-efficient computing · 9% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.4 | 1 | 2020 | PIXEL: Photonic Neural Network Accelerator · HPCA 2020 |
Emerging computing paradigms
optical computing |
0.4 | 1 | 2020 | PIXEL: Photonic Neural Network Accelerator · HPCA 2020 |
Hardware accelerators and domain-specific architectures › photonic accelerator
optical neural network accelerator |
0.4 | 1 | 2020 | PIXEL: Photonic Neural Network Accelerator · HPCA 2020 |
Methods — techniques the papers use, named apart from their topics
microring resonators · 0.4mach-zehnder interferometer · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | PIXEL: Photonic Neural Network AcceleratorabstractMachine learning (ML) architectures such as Deep Neural Networks (DNNs) have achieved unprecedented accuracy on modern applications such as image classification and speech recognition. With power dissipation becoming a major concern in ML architectures, computer architects have focused on designing both energy-efficient hardware platforms as well as optimizing ML algorithms. To dramatically reduce power consumption and increase parallelism in neural network accelerators, disruptive technology such as silicon photonics has been proposed which can improve the performance-per-Watt when compared to electrical implementation. In this paper, we propose PIXEL - Photonic Neural Network Accelerator that efficiently implements the fundamental operation in neural computation, namely the multiply and accumulate (MAC) functionality using photonic components such as microring resonators (MRRs) and Mach-Zehnder interferometer (MZI). We design two versions of PIXEL - a hybrid version that multiplies optically and accumulates electrically and a fully optical version that multiplies and accumulates optically. We perform a detailed power, area and timing analysis of the different versions of photonic and electronic accelerators for different convolution neural networks (AlexNet, VGG16, and others). Our results indicate a significant improvement in the energy-delay product for both PIXEL designs over traditional electrical designs (48.4% for OE and 73.9% for OO) while minimizing latency, at the cost of increased area over electrical designs. Kyle Shiflett, Dylan Wright, Avinash Karanth, Ahmed Louri |
HPCA | 2 |