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Hsiao-Yu Chiang

dblp:265/3317 · DBLP profile ↗
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3ranked-venue papers
2as first author
1since 2021 · last 2022
0000-0001-7194-5878ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021Artificial intelligence and machine learning · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Hardware security and side channels · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels › hardware obfuscation › logic obfuscation
logic locking
1.022022
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
LOOPLock: Logic Optimization-Based Cyclic Logic Locking · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020
Hardware security and side channels › hardware obfuscation › logic obfuscation › logic locking
SAT-resistant logic locking
0.612022
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2022
Electronic design automation › hardware security
logic locking
0.412020
LOOPLock: Logic Optimization-Based Cyclic Logic Locking · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020
Electronic design automation › logic synthesis
logic optimization
0.412020
LOOPLock: Logic Optimization-Based Cyclic Logic Locking · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020

Methods — techniques the papers use, named apart from their topics

noncombinational cycle insertion · 0.9SAT attack resistance · 0.9removal attack · 0.6SAT attack · 0.6CycSAT · 0.6
YearPublicationVenuePosition
2022 LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach
abstract
LOOPLock is the state-of-the-art cyclic logic locking method in hardware security. LOOPLock is able to invalidate SAT Attack, Removal Attack, and CycSAT simultaneously by introducing two types of cycle pairs in a circuit. In this work, we analyze LOOPLock’s locking mechanism and propose an attacking approach based on locking structure analysis. Furthermore, to defend the new attack, we propose LOOPLock 2.0, which strengthens the original cyclic logic locking method—LOOPLock. Experimental results show the efficiency and effectiveness of the proposed attacking approach to LOOPLock and the high defense capability of LOOPLock 2.0.
Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2020 Understanding the Source of Semantic Regularities in Word Embeddings
abstract
Semantic relations are core to how humans understand and express concepts in the real world using language.Recently, there has been a thread of research aimed at modeling these relations by learning vector representations from text corpora.Most of these approaches focus strictly on leveraging the co-occurrences of relationship word pairs within sentences.In this paper, we investigate the hypothesis that examples of a lexical relation in a corpus are fundamental to a neural word embedding's ability to complete analogies involving the relation.Our experiments, in which we remove all known examples of a relation from training corpora, show only marginal degradation in analogy completion performance involving the removed relation.This finding enhances our understanding of neural word embeddings, showing that co-occurrence information of a particular semantic relation is the not the main source of their structural regularity.
Hsiao-Yu Chiang, José Camacho-Collados, Zachary A. Pardos
CoNLL1
2020 LOOPLock: Logic Optimization-Based Cyclic Logic Locking
abstract
SAT Attack, CycSAT, and Removal Attack have demonstrated their abilities to break most existing logic locking methods. In this article, we propose a new cyclic logic locking method to invalidate these attacks simultaneously. Our main intention is to create noncombinational cycles to lock a circuit. Specifically, the noncombinational behavior in the noncombinational cycles that is unobservable at the primary outputs (POs) needs to be preserved when the correct key-vector is fed to resist CycSAT, and the noncombinational behavior in the noncombinational cycles affecting POs needs to be preserved when the incorrect key-vector is fed to invalidate SAT Attack. Furthermore, some nodes will be removed when applying our locking method, which is able to defend Removal Attack. The experimental results show the effectiveness and low area overhead of the proposed method.
Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1