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Sangeeta Chowdhary

dblp:266/9123 · DBLP profile ↗
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4ranked-venue papers
3as first author
3since 2021 · last 2026
0000-0003-3053-230XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 3 · 3 first-author · 2 since 2021Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
3 papers
Program analysis · 58% Debugging and program repair · 36% Software testing · 6%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Parallel and multicore computing · 54% Processor architecture and microarchitecture · 46%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Program analysis › dynamic analysis
shadow execution
1.122022
Fast shadow execution for debugging numerical errors using error free transformations · Proc. ACM Program. Lang. 2022
Parallel shadow execution to accelerate the debugging of numerical errors · ESEC/SIGSOFT FSE 2021
Program analysis
dynamic analysis
0.612022
Fast shadow execution for debugging numerical errors using error free transformations · Proc. ACM Program. Lang. 2022
Debugging and program repair
fault localization
0.612022
Fast shadow execution for debugging numerical errors using error free transformations · Proc. ACM Program. Lang. 2022
Parallel and multicore computing › parallel computing
parallel program debugging
0.512021
Parallel shadow execution to accelerate the debugging of numerical errors · ESEC/SIGSOFT FSE 2021
Processor architecture and microarchitecture › computer arithmetic
floating-point representation
0.412020
Debugging and detecting numerical errors in computation with posits · PLDI 2020
Software testing
test oracle
0.212022
Fast shadow execution for debugging numerical errors using error free transformations · Proc. ACM Program. Lang. 2022

Methods — techniques the papers use, named apart from their topics

load balancing · 1.0higher precision shadow execution · 1.0dynamic analysis · 0.9selective shadow execution · 0.6error free transformations · 0.6directed acyclic graph · 0.6
YearPublicationVenuePosition
2026 From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR
abstract
General-purpose compilers abstract away parallelism, locality, and synchronization, limiting their effectiveness on modern spatial architectures. As modern computing architectures increasingly rely on fine-grained control over data movement, execution order, and compute placement for performance, compiler infrastructure must provide explicit mechanisms for orchestrating compute and data to fully exploit such architectures. We introduce MLIR-AIR, a novel, open source compiler stack built on MLIR that bridges the semantic gap between high-level workloads and fine-grained spatial architectures such as AMD’s NPUs. MLIR-AIR defines the AIR dialect, which provides structured representations for asynchronous and hierarchical operations across compute and memory resources. AIR primitives allow the compiler to orchestrate spatial scheduling, distribute computation across hardware regions, and overlap communication with computation without relying on ad hoc runtime coordination or manual scheduling. We demonstrate MLIR-AIR’s capabilities through two case studies: matrix multiplication and the multi-head attention block from the LLaMA 2 model. For matrix multiplication, MLIR-AIR achieves up to 78.7% compute efficiency and generates implementations with performance almost identical to state-of-the-art, hand-optimized matrix multiplication written using the lower-level, close-to-metal MLIR-AIE framework. For multi-head attention, we demonstrate that the AIR interface supports fused implementations using approximately 150 lines of code, enabling tractable expression of complex workloads with efficient mapping to spatial hardware. MLIR-AIR transforms high-level structured control flow into spatial programs that efficiently utilize the compute fabric and memory hierarchy of an NPU, leveraging asynchronous execution, tiling, and communication overlap through compiler-managed scheduling.
Erwei Wang, Samuel Bayliss, Andra Bisca, Zachary Blair, Sangeeta Chowdhary, Kristof Denolf, Jeff Fifield, Brandon Freiberger, Erika Hunhoff, Phil James-Roxby, Jack Lo, Joseph Melber, Stephen Neuendorffer, Eddie Richter, André Rösti, Javier Setoain, Gagandeep Singh 0002, Endri Taka, Pranathi Vasireddy, Zhewen Yu, Niansong Zhang, Jinming Zhuang
ACM Trans. Reconfigurable Technol. Syst.5
2022 Fast shadow execution for debugging numerical errors using error free transformations
abstract
This paper proposes, EFTSanitizer, a fast shadow execution framework for detecting and debugging numerical errors during late stages of testing especially for long-running applications. Any shadow execution framework needs an oracle to compare against the floating point (FP) execution. This paper makes a case for using error free transformations, which is a sequence of operations to compute the error of a primitive operation with existing hardware supported FP operations, as an oracle for shadow execution. Although the error of a single correctly rounded FP operation is bounded, the accumulation of errors across operations can result in exceptions, slow convergences, and even crashes. To ease the job of debugging such errors, EFTSanitizer provides a directed acyclic graph (DAG) that highlights the propagation of errors, which results in exceptions or crashes. Unlike prior work, DAGs produced by EFTSanitizer include operations that span various function calls while keeping the memory usage bounded. To enable the use of such shadow execution tools with long-running applications, EFTSanitizer also supports starting the shadow execution at an arbitrary point in the dynamic execution, which we call selective shadow execution. EFTSanitizer is an order of magnitude faster than prior state-of-art shadow execution tools such as FPSanitizer and Herbgrind. We have discovered new numerical errors and debugged them using EFTSanitizer.
Sangeeta Chowdhary, Santosh Nagarakatte
Proc. ACM Program. Lang.1
2021 Parallel shadow execution to accelerate the debugging of numerical errors
abstract
This paper proposes a new approach for debugging errors in floating point computation by performing shadow execution with higher precision in parallel. The programmer specifies parts of the program that need to be debugged for errors. Our compiler creates shadow execution tasks, which execute on different cores and perform the computation with higher precision. We propose a novel method to execute a shadow execution task from an arbitrary memory state, which is necessary because we are creating a parallel shadow execution from a sequential program. Our approach also ensures that the shadow execution follows the same control flow path as the original program. Our runtime automatically distributes the shadow execution tasks to balance the load on the cores. Our prototype for parallel shadow execution, PFPSanitizer, provides comprehensive detection of errors while having lower performance overheads than prior approaches.
Sangeeta Chowdhary, Santosh Nagarakatte
ESEC/SIGSOFT FSE1
2020 Debugging and detecting numerical errors in computation with posits
abstract
Posit is a recently proposed alternative to the floating point representation (FP). It provides tapered accuracy. Given a fixed number of bits, the posit representation can provide better precision for some numbers compared to FP, which has generated significant interest in numerous domains. Being a representation with tapered accuracy, it can introduce high rounding errors for numbers outside the above golden zone. Programmers currently lack tools to detect and debug errors while programming with posits.
Sangeeta Chowdhary, Jay P. Lim, Santosh Nagarakatte
PLDI1