EDBT 2026 Demo / reviewers in the wild / expert
Zetao Guo
dblp:267/4606
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2026
0009-0006-3128-4618ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Fold-FP4: Folding for Energy Efficient FP4 Matrix Multiplication
Qiyan Fang, Zetao Guo |
APPT | 5 |
| 2026 | AO-BFP: An Adaptive Mixed-Precision and Outlier-Aware Block Floating-Point Accelerator for Large Language Model InferenceabstractLarge Language Models (LLMs) have achieved remarkable success in Natural Language Processing (NLP) tasks, but their deployment is severely constrained by intensive computation and memory costs. Block Floating-Point (BFP) extends the dynamic range beyond INT with shared exponents, while reducing memory and alignment overhead compared to floating-point formats. However, when bit-widths are further reduced, BFP becomes sensitive to outliers; existing mixed-precision BFP methods largely rely on heuristic settings of mantissa width and block size, and the induced bit-level sparsity has yet to be systematically leveraged in hardware. In this paper, we propose AO-BFP, an adaptive BFP framework for LLM inference. At the algorithm level, we propose an adaptive outlier exponent mapping mechanism combined with mixed-precision exploration driven by layer-wise sensitivity analysis. At the hardware level, we design a reconfigurable bit-serial accelerator with a unified datapath that efficiently leverages BFP-induced bit sparsity. Compared with prior LLM accelerators such as ANT, OliVe, and BitMoD, AO-BFP achieves superior performance while preserving model accuracy, delivering speedups of 1.61×, 1.39×, and 1.11×, respectively. Zetao Guo, Wendi Sun, Qiyan Fang, Song Chen 0001, Yi Kang |
DATE | 2 |
| 2026 | Model-Hardware Co-Design of Depthwise Separable Convolution With Interlayer Pipelining for Stereo Matching
Zetao Guo, Wendi Sun, Jiaheng Ruan, Yukang Han, Song Chen 0001 |
IEEE Trans. Very Large Scale Integr. Syst. | 1 |