Demo Data from EDBT 2026 / reviewers in the wild / expert
Andrew R. Neureuther
dblp:27/123
· DBLP profile ↗
10ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 10
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
10 papers |
Electronic design automation · 78% Performance modeling and evaluation · 8% High-performance computing · 7% |
Topics — the 13 heaviest of 16, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › technology computer-aided design
process simulation |
0.1 | 6 | 1994 | Algorithms for simulation of three-dimensional etching · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 Models and algorithms for three-dimensional topography simulation with SAMPLE-3D · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993 |
Electronic design automation › technology computer-aided design › process simulation
lithography simulation |
0.0 | 4 | 1995 | Massively parallel electromagnetic simulation for photolithographic applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 Algorithms for simulation of three-dimensional etching · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993 |
Electronic design automation
technology computer-aided design |
0.0 | 3 | 1992 | The intertool profile interchange format: a technology CAD environment approach [semiconductor technology] · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991 Linking TCAD to EDA - Benefits and Issues · DAC 1991 A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Electronic design automation
electromagnetic simulation |
0.0 | 1 | 1995 | Massively parallel electromagnetic simulation for photolithographic applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
High-performance computing › large-scale simulation
parallel scientific simulation |
0.0 | 1 | 1995 | Massively parallel electromagnetic simulation for photolithographic applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › CAD framework
design tool integration |
0.0 | 2 | 1991 | The intertool profile interchange format: a technology CAD environment approach [semiconductor technology] · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991 SIMPL-2: (SIMulated Profiles from the Layout-Version 2) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Performance modeling and evaluation › simulation › simulation software
simulation framework |
0.0 | 1 | 1992 | A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Performance modeling and evaluation › numerical algorithms
finite difference time domain |
0.0 | 1 | 1991 | Massively parallel algorithms for scattering in optical lithography · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991 |
Parallel and multicore computing › parallel algorithms
massively parallel algorithms |
0.0 | 1 | 1991 | Massively parallel algorithms for scattering in optical lithography · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991 |
Electronic design automation › technology computer-aided design
profile interchange format |
0.0 | 1 | 1991 | The intertool profile interchange format: a technology CAD environment approach [semiconductor technology] · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991 |
Emerging computing paradigms
cellular automata |
0.0 | 1 | 1988 | Simulation of microcrack effects in dissolution of positive resist exposed by X-ray lithography · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Electronic design automation › physical design › lithography
phase shift mask |
0.0 | 1 | 1995 | Massively parallel electromagnetic simulation for photolithographic applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation
CAD framework |
0.0 | 1 | 1992 | A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Methods — techniques the papers use, named apart from their topics
time-domain finite-difference method · 0.0massively parallel computing · 0.0visibility computation · 0.0surface advancement · 0.0recursive ray method · 0.0ray-string algorithm · 0.0facet motion · 0.0convolution · 0.0fixed time step dissolution · 0.0dynamic memory allocation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | Massively parallel electromagnetic simulation for photolithographic applicationsabstractThe two-dimensional massively parallel electromagnetic simulation program TEMPEST has been generalized to extend its applicability to many of the difficult problems in photolithography, metrology, and alignment. TEMPEST, which has been made available on the NCSA and other computing centers, combines together techniques for analysis of the transverse electric (TE) and the transverse magnetic (TM) polarizations, oblique incidence, highly dispersive materials, and a technique for synthesis of partially coherent optical images. The solution is based on the time-domain finite-difference method, but exploits the power of massively parallel computer architectures. Equations suitable for massively parallel implementation are given for oblique incidence, both polarizations and dispersive materials. Computer time per iteration cycle is constant irrespective of the polarization and angle of incidence. However, the total simulation time for convergence was found to be dominated by physical scattering phenomena. Convergence for the TM polarization is 1.5 times slower than the TE polarization because of edge currents, and oblique incidence is 2 times slower than normal incidence owing to artificial reflection from the domain boundaries. A typical simulation time is three to five minutes with 256 k (1 k=1024) simulation nodes on a CM-2 with 8 k processors. The effectiveness of the program for photolithographic applications is demonstrated by considering the effects of subtle changes in phase-shifting mask topography on the optical images.> Alfred Kwok Kit Wong, Roberto Guerrieri, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 1994 | Models and algorithms for three-dimensional topography simulation with SAMPLE-3DabstractAlgorithms for general surface advancement, three-dimensional visibility, and convolution over a surface have been developed and coupled with physical models for pattern transfer. The resulting program, SAMPLE-3D, allows practical simulation of plasma etching and deposition processes on engineering workstations. The physical models are 3-D extensions of 2-D string and segment based models. The models include secondary effects, such as material density variations and damage enhanced etching. A general facet motion algorithm supports simple, isotropic, cosine-directional, and general surface orientation dependent processes. A 3-D grid of rectangular prismatic cells, which is updated by the advancing surface, contains an alternate topography representation for fast shadow and visibility calculation. The program is organized as a collection of modular functions for continued model and algorithm development. Guidelines for estimating CPU and memory requirements for various models and simulation cases are based on an analysis of the algorithms and data structures. Simple processes, such as lithography development, require 1-5 min of CPU time. Simulations involving integration over flux distributions, such as plasma etching and sputter deposition, require from 5-30 min for typical cases. Reflection or surface migration calculations require from 30-60 min. Physical memory of 4-32 megabytes is sufficient for many practical simulations.> Edward W. Scheckler, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1994 | Algorithms for simulation of three-dimensional etchingabstractA three-dimensional optical lithography simulator has been developed based on a new ray-string algorithm for dissolution etch-front advancement. In developing the new algorithm, performance studies of cell, string and ray algorithms were carried out in two dimensions. A key finding was that a recursive ray method for the calculation of the surface-advancement vector produced numerically stable and highly accurate results. The optimum algorithm was found to be one that combines the recursive-ray method with the string approach, in which etch-rate-dependent rays are used to advance the points, segments and triangles which make up the etching boundary. This algorithm has been implemented in 3-D in the C programming language, using a linked-list data structure to represent the etching boundary mesh. Recursive time-step selection, mesh modification, and clipping and delooping of the etch boundary surface have been implemented. The 3-D ray-string etch simulator has been coupled to 2-D imaging and 3-D resist-exposure simulators to form SAMPLE-3D, a complete fast and accurate 3-D photolithography simulator. The complete simulator has been used to investigate various issues in 3-D lithographic pattern transfer.> Kenny K. H. Toh, Andrew R. Neureuther, Edward W. Scheckler |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1993 | An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verificationabstractA fast three-dimensional volume removal algorithm for resist dissolution is presented and verified with applications to optical lithography with phase-shift masks, resist silylation, and electron-beam lithography. Memory requirements are reduced by dynamically allocating complete topography and material information only at surface cells, and setting other cells as either bulk material or developer. The dissolution algorithm uses a fixed time step and stores the volume of material remaining in the surface cells. A simple redistribution scheme is used if more volume would be removed from a cell in one time step that is currently present. The compactness and speed of the algorithm make it suitable for use on engineering workstations. Simulations requiring 100*100*100 cells can be performed in a few minutes. Theoretical defocus effects in phase-shift mask lithography and shot-size error in electron-beam lithography are compared with experiment. A dry-etch resist silylation process is also investigated.> Edward W. Scheckler, Nelson N. Tam, Anton K. Pfau, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 1992 | A utility-based integrated system for process simulationabstractAn integrated process simulation system which uses functional utilities to integrate disparate 2-D simulation tools is described. The software utilities provide mechanisms for simulator input generation and user interaction, for mapping between different cross-section formats, and for output visualization. The specific utilities are described. With this approach, several process simulators for lithography, etching, deposition, and thermal processing have been integrated into a unified system, SIMPL-IPX (simulation of profiles from the layout-integrated process simulation environment with X-Windows). Simulation examples for metal l planarization, bipolar technology with a polysilicon , collector 5 plug, and advanced lithography are presented to demonstrated 7 the usefulness of this approach to technology CAD tool 8 integration. Methods for improved data management using 9 a CAD framework are described.> Edward W. Scheckler, Alexander S. Wong, Robert K. Wang, Goodwin R. Chin, John R. Camagna, Andrew R. Neureuther, Robert W. Dutton |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 6 |
| 1991 | Linking TCAD to EDA - Benefits and IssuesabstractArticle Free Access Share on Linking TCAD to EDA—benefits and issues Authors: G. Chin Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile , W. Dietrich Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile , D. Boning Texas Instruments, Dallas, TX Texas Instruments, Dallas, TXView Profile , A. Wong University of California at Berkeley, Berkeley, CA University of California at Berkeley, Berkeley, CAView Profile , A. Neureuther University of California at Berkeley, Berkeley, CA University of California at Berkeley, Berkeley, CAView Profile , R. Dutton Stanford University, Stanford, CA Stanford University, Stanford, CAView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 573–578https://doi.org/10.1145/127601.127735Published:01 June 1991Publication History 5citation247DownloadsMetricsTotal Citations5Total Downloads247Last 12 Months22Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF Goodwin R. Chin, Walter C. Dietrich Jr., Duane S. Boning, Alexander S. Wong, Andrew R. Neureuther, Robert W. Dutton |
DAC | 5 |
| 1991 | Massively parallel algorithms for scattering in optical lithographyabstractA novel massively parallel technique for rigorous simulation of topography scattering in optical lithography has been developed and tested. The method is equivalent to the time-domain finite-difference method (TDFDM) used in electromagnetic scattering simulations, but exploits the parallel nature of wave propagation and the power of recent massively parallel architectures such as the Connection Machine. A working code called TEMPEST has been implemented on a Connection Machine CM-2 having 1 to 32 K processors with up to 1 M virtual processors. Numerical accuracy comparable with that of other fully rigorous methods was achieved. A very significant finding was that the solution required constant time per iteration for problems ranging from a few thousand unknowns up to one million, provided the ratio between the problem size and the number of processors is kept constant. The suitability of TEMPEST for solving a large class of topography structures important in alignment, metrology, and lithography is illustrated by examples.> Roberto Guerrieri, Karim H. Tadros, John K. Gamelin, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 1991 | The intertool profile interchange format: a technology CAD environment approach [semiconductor technology]abstractThe binary profile interchange format (BPIF) defines a set of objects and a library of functions which describe an intertool version of the PIF, a representation for semiconductor wafer information. The BPIF toolkit function library enables technology computer-aided design (TCAD) tools, such as process and device simulators, to access PIF data through a common interface, thus facilitating tool integration and encouraging utility sharing. This approach defines a toolkit that is easy to use, and which meets the tool integration and performance needs within a TCAD environment. An experimental BPIF toolkit, based on the C language and the OCT data manager is described in detail. Examples are shown of how TCAD tools may use the toolkit to 'randomly' access wafer data, such as grids and geometries, within a graph of PIF objects. A BPIF package supporting the use of the intertool PIF within the PROSE TCAD environment, which includes a link to the PIF intersite file format, is then presented.> Alexander S. Wong, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1988 | Simulation of microcrack effects in dissolution of positive resist exposed by X-ray lithographyabstractEtchant percolation through voids plays an important role in dissolution of radiation sensitive materials in IC manufacture, but analysis and simulation of this phenomenon are hampered by the complexity of carrying out simulations at up to 20000 voids etching simultaneously. An attempt is made to use a simplified material crack model and a formulation of the model in terms of cellular automata, which is well suited for massively parallel computation. Simulation is then used to characterize etch front propagation and the resulting resist profile shape. An analytic model predicting that the etch front velocity goes as a geometrical series in the product of crack density times the square of crack length shows agreement with the simulation results.> Roberto Guerrieri, Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1988 | SIMPL-2: (SIMulated Profiles from the Layout-Version 2)abstractSIMPL is a computer-aided-design (CAD) tool for simulating the cross-sectional profile of integrated circuits along an arbitrary cut-line drawn on the layout. The linked-list arbitrary polygonal data structure, process specification file, physical process algorithms, graphics display interface, and linking to external rigorous process simulators of SIMPL-2 are described. SIMPL-2 is capable of displaying in color two-dimensional process effects such as the bird's-beak, lateral diffusion, undercut in etching, and sidewall coverage in deposition, based on its linked-polygonal and grid-type databases. The device profile from the composite can be generated rapidly in several minutes on a VAX 11/780 using elementary internal physical process models. SIMPL-2 can also invoke more rigorous external process simulators through an interface for profile data and transfer of control, providing a heretofore missing link between layout-based CAD tools and process and device simulators.> Andrew R. Neureuther |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |