Tatsumi Furuya

dblp:27/1453 · DBLP profile ↗
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10ranked-venue papers
1as first author
0since 2021 · last 2008
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 7 · 1 first-authorSystems, architecture and hardware · 3Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 64% Parallel and multicore computing · 36%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › SIMD
parallel associative processor
0.021991
IXM2: A Parallel Associative Processor · ISCA 1991
IXM2: A Parallel Associative Processor for Knowledge Processing · AAAI 1991
Parallel and multicore computing › parallel architecture
associative processor
0.011991
IXM2: A Parallel Associative Processor · ISCA 1991
Parallel and multicore computing › parallel architecture
parallel processor
0.011991
IXM2: A Parallel Associative Processor · ISCA 1991
Processor architecture and microarchitecture › SIMD
SIMD processor
0.011991
IXM2: A Parallel Associative Processor · ISCA 1991

Methods — techniques the papers use, named apart from their topics

associative processing · 0.0
YearPublicationVenuePosition
2008 Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins
abstract
To solve the problem of fluctuations in clock timing with digital LSIs (also known as the "clock skew" problem), we propose a genetic algorithm (GA) based clock adjustment method that ensures robust clock-timing to cope with fluctuations in the LSI environment such as temperature or power supply voltage. This method is realized by the combination of dedicated adjustable circuitry and adjustment GA software, with the values for multiple adjustable delay circuits inserted into the clock lines being determined by the GA software after fabrication. Experimental results demonstrate that the proposed method can enhance the operational yields of developed test chips while ensuring sufficient timing margins.
Tatsuya Susa, Masahiro Murakawa, Eiichi Takahashi, Tatsumi Furuya, Tetsuya Higuchi
HIS4
2005 An Automatic Multi-objective Adjustment System for Optical Axes using Genetic Algorithms
abstract
This paper describes an automatic multi-objective adjustment system for optical axes using genetic algorithms. It is difficult for conventional systems to automatically adjust optical axes, because it requires high-precision positioning and angle setting with /spl mu/m resolution. Moreover, multiple goals that have a trade-off relation must be satisfied simultaneously by the adjustment. In order to overcome this problem, we propose a multi-objective adjustment system using genetic algorithms. In experiments, simultaneous alignment for the positioning and the angles (parallelism) of optical axes, which is difficult with conventional methods, could be realized within three hours.
Nobuharu Murata, Tatsumi Furuya, Hirokazu Nosato, Masahiro Murakawa
ISDA2
1998 Adaptive Blind Equalization Using Bottleneck Networks Implemented by Evolvable Hardware
Masahiro Murakawa, Kazuyuki Hiraoka, Tetsuya Higuchi, Tatsumi Furuya, Shuji Yoshizawa
ICONIP4
1996 Hardware Evolution at Function Level
Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tatsumi Furuya, Masaya Iwata, Tetsuya Higuchi
PPSN4
1992 Differentiable Chromosomes: The Genetic Programming of Switchable Shape-Genes
Hugo de Garis, Hitoshi Iba, Tatsumi Furuya
PPSN3
1991 IXM2: A Parallel Associative Processor for Knowledge Processing
Tetsuya Higuchi, Hiroaki Kitano, Tatsumi Furuya, Ken'ichi Handa, Akio Kokubu, Naoto Takahashi
AAAI3
1991 IXM2: A Parallel Associative Processor
abstract
Article IXM2: a parallel associative processor Share on Authors: Tetsuya Higuchi Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305 Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305View Profile , Tatsumi Furuya Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305 Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305View Profile , Kenichi Handa Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305 Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki, Japan 305View Profile , Naoto Takahashi University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki, Japan 305 University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki, Japan 305View Profile , Hiroyasu Nishiyama University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki, Japan 305 University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki, Japan 305View Profile , Akio Kokubu New Media Development Associate, 1-4-28 Mita, Minato-ku, Tokyo, Japan 108 New Media Development Associate, 1-4-28 Mita, Minato-ku, Tokyo, Japan 108View Profile Authors Info & Claims ISCA '91: Proceedings of the 18th annual international symposium on Computer architectureApril 1991 Pages 22–31https://doi.org/10.1145/115952.115956Online:01 April 1991Publication History 5citation307DownloadsMetricsTotal Citations5Total Downloads307Last 12 Months4Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
Tetsuya Higuchi, Tatsumi Furuya, Ken'ichi Handa, Naoto Takahashi, Hiroyasu Nishiyama, Akio Kokubu
ISCA2
1991 Initial evaluation of a parallel associative processor IXM2
Tetsuya Higuchi, Tatsumi Furuya, Ken'ichi Handa, Akio Kokubu
Microprocessing and Microprogramming2
1990 Neurocomputing R&D in Japan
Tatsumi Furuya
Neurocomputing1
1989 The Prototype of a Semantic Network Machine IXM
Tetsuya Higuchi, Tatsumi Furuya, Hiroyuki Kusumoto, Ken'ichi Handa, Akio Kokubu
ICPP (1)2