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D. B. Jarvis

dblp:27/2154 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1960
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design		 0.011960
Transistor Current Switching and Routing Techniques · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital arithmetic circuits
parallel adder		 0.011960
Transistor Current Switching and Routing Techniques · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital circuit design › sequential circuit design
shift register		 0.011960
Transistor Current Switching and Routing Techniques · IRE Trans. Electron. Comput. 1960

Methods — techniques the papers use, named apart from their topics

diffused base transistors · 0.0current routing · 0.0
YearPublicationVenuePosition
1960 Transistor Current Switching and Routing Techniques
abstract
A system of circuit logic is described in which transistors, particularly diffused base transistors, are operated well out of saturation in order to make the most of their speed. Logical information is contained in the presence or absence of a current which can be switched or routed by the gates described. Also described is the application of this system of logic to certain specific computer problems, namely, a parallel adder with a carry propagation time of 40 mμsec over 6 stages, a shifting register capable of operating at 10 mc and a binary decoder with a maximum delay of 40 mμsec.
D. B. Jarvis, L. P. Morgan, J. A. Weaver
 IRE Trans. Electron. Comput.1