Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from EDBT 2026 / reviewers in the wild / expert

Rohan Mandrekar

dblp:27/4095 · DBLP profile ↗
← Back
1ranked-venue papers
1as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 67% Integrated circuit design · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › power integrity
power integrity analysis		 0.112006
System level signal and power integrity analysis methodology for system-in-package applications · DAC 2006
Electronic design automation
signal integrity		 0.112006
System level signal and power integrity analysis methodology for system-in-package applications · DAC 2006
Integrated circuit design › packaging
system-in-package		 0.112006
System level signal and power integrity analysis methodology for system-in-package applications · DAC 2006

Methods — techniques the papers use, named apart from their topics

modeling and simulation · 0.1
YearPublicationVenuePosition
2006 System level signal and power integrity analysis methodology for system-in-package applications
abstract
This paper describes a methodology for performing system level signal and power integrity analyses of SiP-based systems. The paper briefly outlines some new modeling and simulation techniques that have been developed to enable the proposed methodology. Some results based on the application of this methodology on test systems are also presented.
Rohan Mandrekar, Krishna Bharath, Krishna Srinivasan, Ege Engin, Madhavan Swaminathan
 DAC1