Mrinal K. Naskar

dblp:27/5933 · also Mrinal Kanti Naskar · DBLP profile ↗
← Back
12ranked-venue papers
0as first author
6since 2021 · last 2025
0000-0001-9357-887XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 5 · 1 since 2021Systems, architecture and hardware · 4 · 4 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021Security and privacy · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
YearPublicationVenuePosition
2025 Demo Abstract: A Low-Power Real-Time Hardware Accelerator for Edge Detection Using Stochastic Computing
abstract
We present a low-power, stochastic computing-based method for real-time video edge detection. Traditional Sobel-based pipelines are often resource-intensive and consume substantial power. In this work, we simplify the Sobel operator within a stochastic computing framework to achieve significant reductions in hardware complexity and energy consumption. We implement the proposed design on a Basys 3 FPGA interfaced with an OV7670 camera, demonstrating real-time performance. Experimental results show up to 17% energy savings, 84% reduction in LUT utilization, and a 68% decrease in RAM storage and a substantial reduction in hardware footprint compared to a traditional implementation. Demo video link: https://github.com/arghadippurdue/StoBelDemo.
Priyajit Ghosh, Rajarshi Mukherjee, Auro Anand Saha, Sutirtha Naha, Arghadip Das, Arnab Raha, Mrinal K. Naskar
ISLPED7
2025 An algorithmic approach to construct the library of universal logic gates beyond NAND and NOR
Aadarsh G. Goenka, Shyamali Mitra, KC Santosh, Mrinal K. Naskar, Nibaran Das
Integr.4
2024 Design and implementation of anchor coprocessor architecture for wireless node localization applications
Rathindra Nath Biswas, Anurup Saha, Swarup Kumar Mitra, Mrinal K. Naskar
Peer Peer Netw. Appl.4
2023 HIPEDAP: Energy-Efficient Hardware Accelerators for Hidden Periodicity Detection
abstract
Hidden periodicity detection (HPD) forms the basis of various emerging and complex applications such as detecting tandem repeats in DNA, absence seizure detection in EEG signals,etc.. The solutions to the period estimation problem were not satisfactorily accurate until Ramanujan sums (RS) were used to explore the periodic decomposition of signals. Its use in hidden periodicity detection was streamlined to form Ramanujan Filter Bank (RFB), but its usage in the applications proved to be computationally expensive. This paper proposes HIPEDAP, an efficient set of hardware accelerators for hidden periodicity detection applications using Ramanujan Filter Bank. HIPEDAPis developed by proposing several incrementally efficient microarchitectures, from Arch-A to E targeting improvements in different aspects of the design such as area, power, and performance. Further, the inherent error resilience exhibited by HPD applications enables us to propose an approximate architecture Arch-F, that synergistically applies multiple approximation techniques such as approximate adder, multiplier, and precision scaling on top of Arch-E, resulting in significant performance and energy benefits. Experimental results obtained after synthesizing the microarchitectures on 45 nm technology demonstrate that the optimized Arch-E design is able to achieve 4.7X, 8.2X, and 1.7X improvements in terms of area, frequency of execution, and power, respectively. Further, Arch-F demonstrate additional power savings of 14.6% on average (max 32.2%) over Arch-E for almost no loss in application-level quality. Finally, across a suite of practical applications, HIPEDAPexhibited a speed-up in the range of$5.1 \;{\times }\; 10^{2}$X to$3.2 \;{\times }\; 10^{4}$compared to its software implementations.
Arghadip Das, Chandrachur Majumder, Debaprasad De, Arnab Raha, Mrinal K. Naskar
IEEE Trans. Computers5
2023 A Low Latency and Compact GCD Design Using an Intelligent Seed-Selection Scheme of LL-PRNG
abstract
Stochastic computing has shown great promise for a variety of applications, including image processing circuits, due to its design simplicity, and low power consumption. This work proposes a hardware efficient and low-latency implementation of the greatest common divisor (GCD) circuit. It uses a low latency parallel random number generator (LL-PRNG) architecture with an intelligently chosen seed value that eliminates the use of correlators and decorrelators in the circuit, reducing the hardware overhead to a great extent. The proposed approach is compared with the conventional LFSR-based design showing reasonable accuracy while the latency in computation greatly reduced. The circuit is evaluated for blind image deconvolution employing GCD and has shown encouraging results.
Shyamali Mitra, Aadarsh G. Goenka, Mrinal K. Naskar
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2021 Niblack Binarization on Document Images: Area Efficient, Low Cost, and Noise Tolerant Stochastic Architecture
abstract
Binarization plays a crucial role in Optical Character Recognition (OCR) ancillary domains, such as recovery of degraded document images. In Document Image Analysis (DIA), selecting threshold is not trivial since it differs from one problem (dataset) to another. Instead of trying several different thresholds for one dataset to another, we consider noise inherency of document images in our proposed binarization scheme. The proposed stochastic architecture implements the local thresholding technique: Niblack’s binarization algorithm. We introduce a stochastic comparator circuit that works on unipolar stochastic numbers. Unlike the conventional stochastic circuit, it is simple and easy to deploy. We implemented it on the Xilinx Virtex6 XC6VLX760-2FF1760 FPGA platform and received encouraging experimental results. The complete set of results are available upon request. Besides, compared to conventional designs, the proposed stochastic implementation is better in terms of time complexity as well as fault-tolerant capacity.
Shyamali Mitra, KC Santosh, Mrinal K. Naskar
Int. J. Pattern Recognit. Artif. Intell.3
2017 Investigating the impact of cache pollution attacks in heterogeneous cellular networks
abstract
With the growth of Internet-of-Things, mobile data traffic is expected to increase exponentially. To support this rapid growth, heterogeneous cellular networks comprising of femtocells with storage capabilities along with macrocell base stations have been proposed. In this paper, we first investigate the performance impact of a simple randomized cache pollution attack, where the attacker pollutes the cache at the femtocell by requesting unpopular content. We then adopt a principled approach based on the characteristic time of a content in a cache to design an optimized attack strategy. Our experiments show that the proposed attack strategy outperforms the randomized attack with the same attack rate.
Sibendu Paul, Anand Seetharam, Amitava Mukherjee 0001, Mrinal K. Naskar
ICNP4
2017 Characteristic time routing in information centric networks
Bitan Banerjee, Anand Seetharam, Amitava Mukherjee 0001, Mrinal K. Naskar
Comput. Networks4
2016 BSMAC: A Hybrid MAC Protocol for IoT Systems
abstract
This paper proposes a new medium access control (MAC) protocol for low power sensor devices, suitable for IoT systems. IEEE 802.15.4 standard is suitable for low power wireless personal area network (WPAN) but it does not satisfy the data rate and reliability requirements for IoT systems in a 5G wireless network. We have observed that unnecessary packet drop takes place due to beacon superframe broadcasting during data transmission and it is the primary reason for the standard's data-rate and reliability shortfall. This problem represents a scenario where data transmission takes place with the lack of available time for data transmission in that superframe duration. To overcome this lacuna, we incorporate backoff freezing mechanism, where the backoff counter freezes whenever the available time for data transmission is insufficient in that superframe duration. A novel sleep protocol is designed to reduce power consumption in idle states too. The proposed MAC protocol is modeled using a 3- dimensional Markov chain for analytical performance evaluation. Analytical results are verified with the simulation run in ns-2.35. Proposed MAC with sleep protocol significantly outperforms the existing state-of-the-art protocols.
Bitan Banerjee, Amitava Mukherjee 0001, Mrinal K. Naskar, Chintha Tellambura
GLOBECOM3
2012 An optimal sensor deployment scheme to ensure multi level coverage and connectivity in wireless sensor networks
abstract
This paper introduces an optimal deployment algorithm of sensors in a given region to provide desired coverage and connectivity for a wireless sensor network. Our paper utilizes two separate procedures for covering different regions of a symmetrical rectangular area. The proposed method divides the given area of interest into two distinct sub-regions termed as the central and edge regions. In each region, a unique scheme is used to determine the number and location of sensors required to monitor and completely cover the region keeping the connectivity and coverage ranges of the sensors, their hardware specification and the dimensions of the region concerned as the constraints. Our scheme reduces the overhead in determining the position of sensors for deployment by following a coverage and connectivity algorithm of lesser complexity rather than those present in related schemes. Finally, we compare our deployment scheme with the interpolation scheme of [2] in regions of different dimensions and different coverage and connectivity levels with different sensing ranges of the sensors to show our cost efficiency over the latter.
Arnab Raha, Shovan Maity, Mrinal K. Naskar, Omar Alfandi, Dieter Hogrefe
IWCMC3
2012 Fuzzy Logic Election of Node for Routing in WSNs
abstract
Sensor nodes of Wireless Sensor Networks (WSNs) are resource constraints in energy, memory, processing and communication bandwidth. Since they are operated by battery, their life span is limited. Specially, energy conservation is very important issue in the WSN, because it directly affects the life of the node as well as the entire network. Here, we develop a new way of electing a node among many trustworthy nodes for routing processes. This method consumes the energies of network nodes based on Fuzzy logic applied on their residual energy, trust level and distance from the Base Station. The proposed method elects one indispensible node for participating in routing among many worthy nodes. Hence, this method of election of node for routing in WSN sees the conservation of nodes energies go by very smooth and justifying, thereby increasing the life of the WSN.
Shaik Sahil Babu, Arnab Raha, Mrinal K. Naskar, Omar Alfandi, Dieter Hogrefe
TrustCom3
2007 Genetic evolutionary algorithm for static traffic grooming to SONET over WDM optical networks
Kuntal Roy, Mrinal K. Naskar
Comput. Commun.2