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Neelesh Bhattacharya

dblp:27/9612 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 4 · 3 first-authorArtificial intelligence and machine learning · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Software maintenance and evolution · 81% Program analysis · 19%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Software maintenance and evolution
anti-pattern detection
0.112012
Support vector machines for anti-pattern detection · ASE 2012
Software maintenance and evolution
software maintenance
0.012012
Support vector machines for anti-pattern detection · ASE 2012
Program analysis
source code analysis
0.012012
Support vector machines for anti-pattern detection · ASE 2012

Methods — techniques the papers use, named apart from their topics

support vector machine · 0.1
YearPublicationVenuePosition
2012 Support vector machines for anti-pattern detection
abstract
Developers may introduce anti-patterns in their software systems because of time pressure, lack of understanding, communication, and--or skills. Anti-patterns impede development and maintenance activities by making the source code more difficult to understand. Detecting anti-patterns in a whole software system may be infeasible because of the required parsing time and of the subsequent needed manual validation. Detecting anti-patterns on subsets of a system could reduce costs, effort, and resources. Researchers have proposed approaches to detect occurrences of anti-patterns but these approaches have currently some limitations: they require extensive knowledge of anti-patterns, they have limited precision and recall, and they cannot be applied on subsets of systems. To overcome these limitations, we introduce SVMDetect, a novel approach to detect anti-patterns, based on a machine learning technique---support vector machines. Indeed, through an empirical study involving three subject systems and four anti-patterns, we showed that the accuracy of SVMDetect is greater than of DETEX when detecting anti-patterns occurrences on a set of classes. Concerning, the whole system, SVMDetect is able to find more anti-patterns occurrences than DETEX.
Abdou Maiga, Nasir Ali, Neelesh Bhattacharya, Aminata Sabané, Yann-Gaël Guéhéneuc, Giuliano Antoniol, Esma Aïmeur
ASE3
2012 Optimizing Threads Schedule Alignments to Expose the Interference Bug Pattern
Neelesh Bhattacharya, Olfat El-Mahi, Etienne Duclos, Giovanni Beltrame, Giuliano Antoniol, Sébastien Le Digabel, Yann-Gaël Guéhéneuc
SSBSE1
2011 SoftwareHardware Hybrid Systems Verification
abstract
Verification of softwarehardware hybrid systems is difficult because of the inter process communication, concurrency and synchronization and the configuration of processors. Multi-Processor Systems on Chip (MPSoC) are examples of such hybrid systems, targeted for embedded systems. We focus on the verification of MPSoC software (application running on MPSoC) and the system consisting of the application running on the MPSoC platform. We aim at generating test cases for verifying the software while overcoming the limitations of previous approaches. Metaheuristic approaches get blocked in local optima and constraint programming approaches are slow on complex programs, to satisfy given coverage criteria. We propose to combine metaheuristic and constraint programming solvers in a novel way: executing both the solvers sequentially and splitting and reducing the individual input variable domains. We also propose to generate test cases from the functional test objectives to check the proper functioning of the software running on the hardware platform. We report the results of the preliminary experiments.
Neelesh Bhattacharya
ICST1
2011 Divide-by-Zero Exception Raising via Branch Coverage
Neelesh Bhattacharya, Abdelilah Sakti, Giuliano Antoniol, Yann-Gaël Guéhéneuc, Gilles Pesant
SSBSE1