This paper describes the design of an analog attenuator integrated circuit having loss settings that can be determined by remote digital control. The circuit uses a weighted MOS capacitor array to effect losses of 0-16.5 dB in steps of 0.1 dB. Each loss setting is accurate to ± 0.02dB. Two approaches to the circuit realization are described: a CMOS version that includes a digital memory to permit retention of loss settings for a few hours, thereby bridging brief power failures, and a more compact NMOS version that contains all the analog components on a single chip.

In 1969 Iwersen [4] analyzed the quantizing noise (assuming no slope overload) associated with a delta modulator (\DeltaM) with step-size imbalance. In this concise paper we consider the effects of both step-size imbalance and quantizer threshold hysteresis on\DeltaMquantizing noise. The analysis is restricted to the important case of zero input signal. For this case we extend Iwersen's work to show that quantizer threshold hysteresis can significantly change the spectral shape of the idle channel noise. Our approach is to first construct two locus functions, one for the samples (of the steady-state noise waveform) taken at arbitrarily defined even sampling times and one for those taken at the odd sampling times. The noise waveform is then obtained as a superposition of interleaved samples of the even and odd loci. It is shown that the noise spectrum has a discrete tonal struture whose frequencies are independent of hysteresis and are determined solely by step imbalance as in Iwersen's analysis. Hysteresis changes the magnitude and phase of the discrete tones. We characterize the tone magnitude changes due to hysteresis and show that hysteresis can amplify, attenuate, or completely eliminate a tone. We present curves which specify the tone magnitude attenuation as a function of step imbalance ε, average step size σ, and hysteresish. We also calculate PT, the total noise power in the baseband up to half the sampling frequency. It is shown that for0 \leq h \leq \epsilon,P_{T} = \sigma^{2}/3independent ofhand ε ;forh > \epsilon, PTis an increasing function of\epsilon/\sigmaandh/\epsilon.

Delta modulation (DM) is an attractive method of analog-to-digital (A/D) conversion in applications where simple and economical designs must be realized without sacrificing conversion quality. This paper describes a new single-chip, bipolar integrated circuit delta modulator that maintains a high conversion resolution over a wide range of sampling frequencies and ambient conditions. Its high-speed operation (maximum sampling rates greater than 15 Mbit/s) is achieved with lower power requirements than with comparable discrete realizations. Low sensitivities to power supply and ambient temperature variations, achieved with a novel logic design, make this circuit useful in a telephone switching office environment and as a buildlng block for other linear and companded analog-to-PCM converters.