EDBT 2026 Demo / reviewers in the wild / expert
Xuanlin Jiang
dblp:272/2725
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2026
0009-0006-2265-1877ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Theory of computation · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Cloud and datacenter computing · 54% Hardware accelerators and domain-specific architectures · 23% Memory systems · 23% | |
| Software engineering, system software, and programming languages
1 paper |
Program verification · 50% Program synthesis and code generation · 50% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
cache management |
1.0 | 1 | 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented Generation · ACM Trans. Comput. Syst. 2026 |
Cloud and datacenter computing › inference serving
LLM serving |
1.0 | 1 | 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented Generation · ACM Trans. Comput. Syst. 2026 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
1.0 | 1 | 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented Generation · ACM Trans. Comput. Syst. 2026 |
Cloud and datacenter computing › inference serving › LLM serving
retrieval-augmented generation serving |
1.0 | 1 | 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented Generation · ACM Trans. Comput. Syst. 2026 |
Program verification › theorem proving
inductive theorem proving |
0.8 | 1 | 2024 | Proving Functional Program Equivalence via Directed Lemma Synthesis · FM (1) 2024 |
Cloud and datacenter computing
inference serving |
0.3 | 1 | 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented Generation · ACM Trans. Comput. Syst. 2026 |
Methods — techniques the papers use, named apart from their topics
speculative pipelining · 1.0knowledge tree · 1.0structural induction · 0.8program synthesis · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | RAGCache: Efficient Knowledge Caching for Retrieval-Augmented GenerationabstractRetrieval-Augmented Generation (RAG) has demonstrated substantial advancements in various natural language processing tasks by integrating the strengths of large language models (LLMs) and external knowledge databases. However, the retrieval step introduces long sequence generation and extra data dependency, resulting in long end-to-end latency. Our analysis benchmarks current RAG systems and reveals that, while the retrieval step poses performance challenges, it also offers optimization opportunities through its retrieval pattern and streaming search behavior. We propose RAGCache, a latency-optimized serving system tailored for RAG. RAGCache leverages the retrieval pattern to organize and cache the intermediate states of retrieved knowledge in a knowledge tree across the GPU and host memory hierarchy, reducing LLM generation time. RAGCache employs dynamic speculative pipelining to exploit the streaming search behavior, overlapping retrieval with LLM generation to minimize end-to-end latency. We implement RAGCache based on vLLM and Faiss, and evaluate it on both open-source and production datasets. Experimental results demonstrate that RAGCache reduces the time to first token (TTFT) by up to 4× and improves the throughput by up to 2.1× compared to vLLM integrated with Faiss. Chao Jin 0007, Xuanlin Jiang, Fangyue Liu, Shufan Liu, Xuanzhe Liu, Xin Jin 0008 |
ACM Trans. Comput. Syst. | 3 |
| 2024 | Proving Functional Program Equivalence via Directed Lemma SynthesisabstractAbstract Proving equivalence between functional programs is a fundamental problem in program verification, which often amounts to reasoning about algebraic data types (ADTs) and compositions of structural recursions. Modern theorem provers provide structural induction for such reasoning, but a structural induction on the original theorem is often insufficient for many equivalence theorems. In such cases, one has to invent a set of lemmas, prove these lemmas by additional induction, and use these lemmas to prove the original theorem. There is, however, a lack of systematic understanding of what lemmas are needed for inductive proofs and how these lemmas can be synthesized automatically. This paper presents directed lemma synthesis, an effective approach to automating equivalence proofs by discovering critical lemmas using program synthesis techniques. We first identify two induction-friendly forms of propositions that give formal guarantees to the progress of the proof. We then propose two tactics that synthesize and apply lemmas, thereby transforming the proof goal into induction-friendly forms. Both tactics reduce lemma synthesis to a set of independent and typically small program synthesis problems that can be efficiently solved. Experimental results demonstrate the effectiveness of our approach: Compared to state-of-the-art equivalence checkers employing heuristic-based lemma enumeration, directed lemma synthesis saves 95.47% runtime on average and solves 38 more tasks over an extended version of the standard benchmark set. Yican Sun, Ruyi Ji, Xuanlin Jiang, Mingshuai Chen, Yingfei Xiong 0001 |
FM (1) | 4 |