A longstanding goal of neuromorphic computing is to develop novel computer architectures with a brain-like energy footprint. Still, key biological components such as dendrites are often overlooked. Instead, more compact scalable neuron models are favored for neuromorphic implementations. Here we present a novel neuroscience-inspired multiplicative circuit that uses shunting inhibition as the multiplicative mechanism in a CMOS dendrite circuit. We demonstrate an experimental implementation of our model on a 350-nm process field programmable analog array (FPAA) integrated circuit (IC), that exhibits shunting inhibition as a multiplicative process in neuromorphic circuits.

Continuous integration (CI) has been a de facto standard for building industrial-strength software. Yet, there is little attention towards applying CI to the development of machine learning (ML) applications until the very recent effort on the theoretical side. In this paper, we take a step forward to bring the theory into practice.