Gyeongseo Park

dblp:273/7302 · DBLP profile ↗
← Back
8ranked-venue papers
2as first author
7since 2021 · last 2026
0000-0002-9791-5447ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 2 first-author · 6 since 2021Software engineering, systems software and programming languages · 3 · 3 since 2021
YearPublicationVenuePosition
2026 DarkStream: Exploiting Internal Throughput Contention in Data Streaming Accelerator for Timing Attacks
Hyosang Kim, Ki-Dong Kang, Gyeongseo Park, Sungju Kim, Daehoon Kim 0001
ISCA3
2025 Co-UP: Comprehensive Core and Uncore Power Management for Latency-Critical Workloads
abstract
Improving energy efficiency to reduce costs in server environments has attracted considerable attention. Considering that processors account for a significant portion of energy consumption in servers, Dynamic Voltage and Frequency Scaling (DVFS) enhances their energy efficiency by adjusting the operational speed and power consumption of processors. Additionally, modern high-end processors extend DVFS functionality not only to core components but also to uncore parts. This is because the increasing complexity and integration of System on Chips (SoCs) have highlighted the substantial energy consumption. However, existing uncore voltage/frequency scaling fails to effectively consider Latency-Critical (LC) applications, leading to sub-optimal energy efficiency or degraded performance. In this paper, we introduce Co-UP, power management that simultaneously scales core and uncore frequencies for latency-critical applications, designed to improve energy efficiency without violating Service Level Objectives (SLOs). To this end, Co-UP incorporates a prediction model that estimates outcomes of energy consumption and performance as uncore and core frequency changes. Based on the estimated gains, Co-UP adjusts to uncore and/or core frequencies to further enhance energy efficiency or performance. This predictive model can rapidly adapt to new and unlearned loads, enabling Co-UP to operate online without any prior profiling. Our experiments show that Co-UP can reduce energy consumption by up to 28.2% compared to existing Intel's policy and up to 17.6% compared to state-of-the-art power management studies, without SLO violations.
Ki-Dong Kang, Gyeongseo Park, Daehoon Kim 0001
DATE2
2025 BrokenSleep: Remote Power Timing Attack Exploiting Processor Idle States
abstract
Power and energy consumption emerge as critical aspects in computing systems, spanning from mobile devices to data-center servers. Modern processors typically support idle states (i.e., C-states), which deactivate specific hardware components, in addition to offering multiple voltage and frequency states (i.e., P-states). While C-states can significantly reduce static power when processor cores are idle, a notable security vulnerability arises due to differences in wake-up latency among various C-states when the processor cores become active again. This paper proposes a security vulnerability arising from processor idle state management, called BrokenSleep, which exploits the aforementioned wake-up latency differences to create covert and side-channel between computing nodes connected via an external network. This study presents the first remote timing attack based on power management, overcoming the limitations of previous research that required the co-location of attacker and victim applications on the same local machine. This advancement significantly extends the range of existing remote timing attacks by integrating power-related factors. Regardless of the computing system types, our experiments demonstrate that an attacker can transfer data to remote machines without direct network access and deduce the keystroke timing. This vulnerability is not confined to a single processor architecture; it affects processors designed by both Intel and ARM, indicating a widespread potential risk across different hardware platforms.
Hyosang Kim, Ki-Dong Kang, Gyeongseo Park, Seungkyu Lee 0002, Daehoon Kim 0001
HPCA3
2025 EcoCore: Dynamic Core Management for Improving Energy Efficiency in Latency-Critical Applications
Gyeongseo Park, Ki-Dong Kang, Yunhyeong Jeon, Seulki Kim, Daehoon Kim 0001
MICRO1
2025 MTAT: Adaptive Fast Memory Management for Co-located Latency-Critical Workloads in Tiered Memory System
abstract
Modern data centers increasingly employ multi-tenant deployment models in which multiple applications or virtual machines share a single physical server. However, existing tiered memory management schemes classify pages solely by access frequency to govern promotions and demotions across memory tiers without accounting for the distinct access patterns of latency-critical (LC) and best-effort (BE) workloads. LC workloads demand low-latency service yet lack sustained high-frequency access; consequently, frequency-based tiering demotes LC data to slower memory (SMem), degrading responsiveness and violating service-level objectives (SLOs).
Seonggyu Han, Gyeongseo Park, Daehoon Kim 0001
Middleware3
2024 vSPACE: Supporting Parallel Network Packet Processing in Virtualized Environments through Dynamic Core Management
abstract
Data centers face significant performance challenges with parallel processing for network I/O in virtualized environments, particularly for latency-critical (LC) workloads that must satisfy strict Service Level Objectives (SLOs). While previous studies have addressed performance challenges in network I/O virtualization, they overlook the impact of excessive parallelism on the performance of Virtual Machines (VMs). We observe that excessive parallelization for VMs and network I/O processing can lead to core oversubscription, resulting in significant resource contention, frequent preemptions, and task migrations. Based on these observations, we propose vSPACE, dynamic core management specifically designed to support parallel network I/O processing in virtualized environments efficiently. To reduce scheduling contention, vSPACE creates distinct core allocation groups for VM and network I/O and assigns dedicated cores to each. Then, it dynamically adjusts the number of allocated cores to enforce appropriate parallelism for VMs and network I/O processing based on varying demands. vSPACE employs continuous monitoring and a heuristic algorithm to periodically determine appropriate core allocation, addressing excessive contention and improving energy and resource efficiency. vSPACE operates in three modes: performance improvement, energy efficiency, and resource efficiency. Our evaluations demonstrate that vSPACE significantly enhances throughput by up to 4.2 × compared to existing core allocation approaches and improves energy and resource efficiency by up to 16.5% and 30.5%, respectively.
Gyeongseo Park, Ki-Dong Kang, Yunhyeong Jeon, Sungju Kim, Hyosang Kim, Daehoon Kim 0001
PACT1
2021 NMAP: Power Management Based on Network Packet Processing Mode Transition for Latency-Critical Workloads
abstract
Processor power management exploiting Dynamic Voltage and Frequency Scaling (DVFS) plays a crucial role in improving the data-center’s energy efficiency. However, we observe that current power management policies in Linux (i.e., governors) often considerably increase tail response time (i.e., violate a given Service Level Objective (SLO)) and energy consumption of latency-critical applications. Furthermore, the previously proposed SLO-aware power management policies oversimplify network request processing and ignore the fact that network requests arrive at the application layer in bursts. Considering the complex interplay between the OS and network devices, we propose a power management framework exploiting network packet processing mode transitions in the OS to quickly react to the processing demands from the received network requests. Our proposed power management framework tracks the transitions between polling and interrupt in the network software stack to detect excessive packet processing on the cores and immediately react to the load changes by updating the voltage and frequency (V/F) states. Our experimental results show that our framework does not violate SLO and reduces energy consumption by up to 35.7% and 14.8% compared to Linux governors and state-of-the-art SLO-aware power management techniques, respectively.
Ki-Dong Kang, Gyeongseo Park, Hyosang Kim, Mohammad Alian, Nam Sung Kim, Daehoon Kim 0001
MICRO2
2020 Improving the Efficiency of Power Management via Dynamic Interrupt Management
abstract
In this paper, we first analyze the effects of interrupt management on response latency of the latency-critical application and the efficiency of current dynamic power management governor which determines Voltage and Frequency States (V/F states) based on CPU utilization. We also demonstrate that interrupt management provides a governor an opportunity to decrease the V/F state without performance degradation. Next, we propose I-state that adjusts the interrupt rate based on the V/F state determined by the governor. When a core is highly utilized with a high V/F state, I-state improves response latency by decreasing interrupt rate, moderating the load on the CPU. I-state also improves energy-efficiency by making the governor decrease the V/F state more often. When a core is not highly utilized while operating at low V/F states, I-state improves response latency by increasing interrupt rate, which can notify the processor of packet arrivals faster so that the CPU processes the packets quickly. Our experimental results show that I-state improves 95thpercentile latency by up to 15.9x while reducing energy consumption by up to 17.6%.
Ki-Dong Kang, Hyungwon Park 0001, Gyeongseo Park, Daehoon Kim 0001
ICCD3