EDBT 2026 Demo / reviewers in the wild / expert
Soojeong Cho
dblp:278/5488
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2021
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 72% Storage systems · 28% | |
| Databases, data mining, and information retrieval
1 paper |
Indexing and storage engines · 100% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Indexing and storage engines › spatial index
r-tree |
0.5 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Indexing and storage engines
spatial index |
0.5 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Storage systems
crash consistency |
0.5 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems
non-volatile memory |
0.5 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems › non-volatile memory
persistent memory |
0.5 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems
cache coherence |
0.1 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems › cache management
cache flushing |
0.1 | 1 | 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent Memory · IEEE Trans. Parallel Distributed Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
non-blocking synchronization · 1.0logging · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Failure-Atomic Byte-Addressable R-tree for Persistent MemoryabstractIn this article, we propose Failure-atomic Byte-addressable R-tree (FBR-tree) that leverages the byte-addressability, persistence, and high performance of persistent memory while guaranteeing the crash consistency. We carefully control the order of store and cacheline flush instructions and prevent any single store instruction from making an FBR-tree inconsistent and unrecoverable. We also develop a non-blocking lock-free range query algorithm for FBR-tree. Since FBR-tree allows read transactions to detect and ignore any transient inconsistent states, multiple read transactions can concurrently access tree nodes without using shared locks while other write transactions are making changes to them. Our performance study shows that FBR-tree successfully reduces the legacy logging overhead and the lock-free range query algorithm shows up to 2.6x higher query processing throughput than the shared lock-based crabbing concurrency protocol. Soojeong Cho, Wonbae Kim, Sehyeon Oh, Changdae Kim 0001, Kwangwon Koh, Beomseok Nam |
IEEE Trans. Parallel Distributed Syst. | 1 |