Multilayered continuous-flow microfluidic biochips are rapidly advancing platforms for delicate bio-applications. The high complexity of biochip structures and application protocols drives the growing demand for design automation solutions. Current research enables the automatic synthesis of the physical layout and the scheduling and binding protocols of biochips, showcasing the significant potential of microfluidic design automation for improved resource utilization and reduced bioassay completion time. However, state-of-the-art synthesis methods primarily focus on device and operation levels, assuming flow paths are always available and neglecting interactions of flow and control channels. This creates a critical gap in the synthesis process, causing performance degradation, resource redundancy, or even infeasible designs. This work bridges this gap with a two-stage approach. Firstly, we perform a mathematical model to synthesize a high-level protocol that specifies the paths and execution orders of fluid transportation operations. Specifically, we construct flow paths based on the fluidic architecture of a given biochip design and optimize scheduling schemes to minimize the completion time of a given bioassay. Next, we perform a simulation-based synthesis of control channel pressurization sequences to realize the high-level protocol. Experimental results confirm that the proposed approach efficiently validates flow paths for feasible designs, identifies conflicting design features in infeasible designs, and improves the design efficiency and quality: compared to the original designs, it reduces the average number of control channels by 49%, and compared to the preliminary work, it reduces the average fluid transportation time by 19% and the average program run time by 38%.

Multilayered continuous-flow microfluidic biochips are highly valued for their miniaturization and high bio-application throughput. However, challenges arise as the dynamic connections of channels, adjusted to satisfy varying demands of fluid transportation at different moments, complicate the execution of bioassays. The existing methods often focus on device binding and operation scheduling during high-level synthesis but overlook the topological connections within the microfluidic network. This oversight leads to mismanagement of conflicts between fluid transportations and erroneous assumptions about constant flow velocities, resulting in decreased accuracy and efficiency or even infeasibility of bioassay execution. To address this problem, we mathematically model the flow velocity that varies according to the dynamic changes of the topological connections between the on-chip components during the execution of the bioassay. Further integrating the flow velocity model into the high-level synthesis, we propose a quadratic programming (QP) method that constructs flow paths and optimizes scheduling schemes to minimize the bioassay completion time. Experimental results confirm that, compared with the state-of-the-art approach, our method shortened the bioassay completion time by an average of 40.9%.

Rapid single flux quantum (RSFQ) logic is a promising technology to supersede CMOS logic in some specialized areas due to providing ultrafast and energy-efficient circuits. To realize a large-scale integration design, electronic design automation (EDA) tools specialized for RSFQ logic are required due to the divergences in logic type, timing constraints, and circuit structure compared with CMOS logic. Logic synthesis is crucial in converting behavioral circuit description into a circuit netlist, typically combining combinational and sequential circuit synthesis. For the RSFQ logic, the sequential circuit synthesis is challenging, especially, for nonlinear sequential blocks with feedback loops. Thus, this article presents a sequential circuit synthesis algorithm based on finite state machine (FSM) decomposition, which ensures design functionality, lowers costs, and improves the RSFQ circuit performance. Additionally, we present the synthesis processes of the feedback logic and the 2-bit counter to demonstrate how the proposed algorithm operates, and ISCAS89 benchmark circuits reveal our method’s ability to synthesize large-scale sequential circuits.

In western China, there is a large area perennially covered by cloud, fog, ice, and snow. It is very difficult to acquire optical image for mapping in this area, so high resolution spaceborne synthetic aperture radar (SAR) images have to be used to make topographic maps. A scheme of SAR mapping technology is proposed in this paper. Digital elevation model (DEM) was extracted with stereo radargrammetry (StereoSAR), and topographic map was created with ideal SAR stereoscopic image pairs. Due to the difficult terrain, parallax edit under stereoscopic observation is used for improving matching result from stereo images. Ideal SAR stereoscopic image pairs generated with image simulation based on DEM are used for stereoscopic observation to extract topographic features. Ascending and descending image data were combined to solve the problem of lack of information caused by shadow and layover. Mapping experiment in western China shows that SAR data with resolution of 3–8 meters can be used to make topographic map at scale of 1∶50,000 by the scheme of SAR mapping introduced in this paper.