Demo Data from EDBT 2026 / reviewers in the wild / expert
Pramote Kuacharoen
dblp:28/599
· DBLP profile ↗
3ranked-venue papers
2as first author
0since 2021 · last 2003
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 87% Integrated circuit design · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems › real-time scheduling › resource sharing protocols
priority inheritance |
0.0 | 1 | 2003 | Hardware Support for Priority Inheritance · RTSS 2003 |
Embedded and real-time systems
real-time synchronization |
0.0 | 1 | 2003 | Hardware Support for Priority Inheritance · RTSS 2003 |
Integrated circuit design
system-on-chip |
0.0 | 1 | 2003 | Hardware Support for Priority Inheritance · RTSS 2003 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2003 | Software Streaming via Block Streaming
Pramote Kuacharoen, Vincent John Mooney III, Vijay K. Madisetti |
DATE | 1 |
| 2003 | Hardware Support for Priority InheritanceabstractPrevious work has shown that a system-on-a-chip lock cache (SoCLC) reduces on-chip memory traffic, provides a fair and fast lock hand-off, simplifies software, increases the real-time predictability of the system and improves performance. In this research work, we extend the SoCLC mechanism with a priority inheritance support implemented in hardware. Priority inheritance provides a higher level of real-time guarantees for synchronizing application tasks. Experimental results indicate that our SoCLC hardware mechanism with priority inheritance achieves a 36% speedup in lock delay, 88% speedup in lock latency, and 15% speedup in the overall execution time when compared to its software counterpart. The cost in terms of additional hardware area for the SoCLC with priority inheritance is approximately 10000 NAND2 gates. Bilge Saglam Akgul, Vincent John Mooney III, Henrik Thane, Pramote Kuacharoen |
RTSS | 4 |
| 2001 | Adaptability, Extensibility, and Flexibility in Real-Time Operating SystemsabstractIn this paper, we present a mechanism for runtime updating of all kernel modules of a highly modular dynamic real-time operating system. Our approach can help solve the lack of adaptability, extensibility and flexibility of existing real-time operating systems. The dynamic real-time operating system will efficiently support a wide range of applications since any kernel module can be dynamically loaded at runtime to exactly suit the applications without necessitating a reboot of the system. Pramote Kuacharoen, Tankut Akgul, Vincent John Mooney III, Vijay K. Madisetti |
DSD | 1 |