Manjunath Doreswamy

dblp:28/6532 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 56% Reconfigurable computing and FPGAs · 28% Processor architecture and microarchitecture · 17%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
design methodology
0.011995
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc · DAC 1995
Electronic design automation › hardware verification and test
hardware verification
0.011995
UltraSPARC-I Emulation · DAC 1995
Reconfigurable computing and FPGAs
processor emulation
0.011995
UltraSPARC-I Emulation · DAC 1995
Processor architecture and microarchitecture
microprocessor design
0.011995
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc · DAC 1995

Methods — techniques the papers use, named apart from their topics

emulation · 0.0
YearPublicationVenuePosition
1995 CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc
abstract
Article Free Access Share on CAD methodology for the design of UltraSPARC-I microprocessor at Sun Microsystems Inc. Authors: A. Cao SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , A. Adalal SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , J. Bauman SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , P. Dedood SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , P. Donehue SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , P. Delisle SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , M. Dell'OcaKhouja SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , T. Doan SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , M. Doreswamy SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , P. Ferolito SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile Authors Info & Claims DAC '95: Proceedings of the 32nd annual ACM/IEEE Design Automation ConferenceJanuary 1995 Pages 19–22https://doi.org/10.1145/217474.217485Published:01 January 1995Publication History 6citation285DownloadsMetricsTotal Citations6Total Downloads285Last 12 Months9Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
A. Cao, A. Adalal, J. Bauman, P. Delisle, P. Dedood, P. Donehue, M. Dell'OcaKhouja, T. Doan, Manjunath Doreswamy, Philip A. Ferolito, O. Geva, D. Greenhill, S. Gopaladhine, J. Irwin, L. Lev, J. MacDonald, M. Ma, Samir Mitra, P. Patel, A. Prabhu, R. Puranik, S. Rozanski, N. Ross, P. Saggurti, Slobodan Simovich, R. Sunder, B. Sur, W. Vercruysse, Michelle Wong, P. Yip, Robert K. Yu, Gregory B. Zyner
DAC9
1995 UltraSPARC-I Emulation
abstract
The next generation UltraSPARC-I CPU represents a significant step forward in processor performance at the cost of increased design complexity.Added complexity increases the risks in achieving functionally correct first silicon.Existing design verification techniques were supplemented by applying emulation to obtain an early look at functionality.Discussed are the goals, methods and results of the UltraSPARC-I emulation.
James Gateley, Miriam Blatt, Dennis Chen, Scott Cooke, Piyush Desai, Manjunath Doreswamy, Mark Elgood, Gary Feierbach, Tim Goldsbury, Dale Greenley, Raju Joshi, Mike Khosraviani, Robert Kwong, Manish Motwani, Chitresh Narasimhaiah, Sam J. Nicolino Jr., Tooru Ozeki, Gary Peterson, Chris Salzmann, Nasser Shayesteh, Jeffrey Whitman, Pak Wong
DAC6