Alzheimer's Disease (AD) is characterized by a range of behavioral alterations, including memory loss and psychiatric symptoms. While there is evidence that molecular pathologies, such as amyloid beta (Aβ), contribute to AD, it remains unclear how this histopathology gives rise to such disparate behavioral deficits. One hypothesis is that Aβ exerts differential effects on neuronal circuits across brain regions, depending on the neurophysiology and connectivity of different areas. To test this, we recorded from large neuronal populations in dorsal CA1 (dCA1) and ventral CA1 (vCA1), two hippocampal areas known to be structurally and functionally diverse, in the APP/PS1 mouse model of amyloidosis. Despite similar levels of Aβ pathology, dCA1 and vCA1 showed distinct disruptions in neuronal population activity as animals navigated a virtual reality environment. In dCA1, pairwise correlations and entropy, a measure of the diversity of activity patterns, were decreased in APP/PS1 mice relative to age-matched C57BL/6 controls. However, in vCA1, APP/PS1 mice had increased pair-wise correlations and entropy as compared to age matched controls. Finally, using maximum entropy models, we connected the microscopic features of population activity (correlations) to the macroscopic features of the population code (entropy). We found that the models' performance increased in predicting dCA1 activity, but decreased in predicting vCA1 activity, in APP/PS1 mice relative to the controls. Taken together, we found that Aβ exerts distinct effects across different hippocampal regions, suggesting that the various behavioral deficits of AD may reflect underlying heterogeneities in neuronal circuits and the different disruptions that Aβ pathology causes in those circuits.

Understanding a neuron's transfer function, which relates a neuron's inputs to its outputs, is essential for understanding the computational role of single neurons. Recently, statistical models, based on point processes and using generalized linear model (GLM) technology, have been widely applied to predict dynamic neuronal transfer functions. However, the standard version of these models fails to capture important features of neural activity, such as responses to stimuli that elicit highly reliable trial-to-trial spiking. Here, we consider a generalization of the usual GLM that incorporates nonlinearity by modeling reliable and nonreliable spikes as being generated by distinct stimulus features. We develop and apply these models to spike trains from olfactory bulb mitral cells recorded in vitro. We find that spike generation in these neurons is better modeled when reliable and unreliable spikes are considered separately and that this effect is most pronounced for neurons with a large number of both reliable and unreliable spikes.

This paper examines different designs for combined channel estimation and decoding for a point to point time varying frequency selective fading channel. The channel state information (CSI) is not known a priori at either the transmitter or the receiver. Channel estimation is performed through a combination of conventional pilots and manufactured pilots from previously decoded data. The paper examines how different interleaver structures affect the tradeoff between achievable rates, delay and complexity. When there is no delay constraint at all, the conventional pilots can be eliminated completely and a proper interleaving scheme can convert half the symbols into manufactured pilots. When there is a delay constraint, the paper explores various interleaver structures that combine the conventional pilots with the manufactured pilots in different ways to get much better achievable rates than conventional pilot-symbol aided channel estimation.

This paper presents analytical upper and lower bounds on the information rate of a multiuser Rayleigh fading channel with no channel state information (CSI) at the transmitters or the receivers. These bounds are shown to converge whenever an individual user's data rate is small compared with the bandwidth, e.g., when users can employ CDMA. The amount of spreading required for a given degree of convergence depends on the number of receive antennas. The number of users can be sufficient for the aggregate spectral density to be large. The paper presents exact analytical expressions for the information rates of both the block fading and the continuous correlated fading channel models in this regime. Finally, the results are extended to more general channel models.

This paper proves that any bandlimited signal within ±0.637V can be represented by a PWM waveform with amplitude V. The number of the pulses in the waveform is equal to the number of the Nyquist samples. This paper also provides a practical iterative procedure to generate the PWM waveform for a given bandlimited signal. The error of this procedure decreases exponentially with the number of iterations.

This talk presents analytical upper and lower bounds on the information rate of a multiuser Rayleigh fading channel with no channel state information (CSI) at the transmitters or the receivers. These bounds are shown to converge whenever an individual userpsilas data rate is small compared with the bandwidth, e.g., when users can employ CDMA. The amount of spreading required for a given degree of convergence depends on the number of receive antennas; however, the number of users can be sufficient for the aggregate spectral density to be large. The talk presents exact analytical expressions for the information rates of both the block fading and the continuous correlated fading channel models in this regime and presents techniques for extending these to more general channel models.

This paper first presents an optimal receiver and coding scheme for a multi-user, multi-receiver, non-coherent Rayleigh flat fading channel which achieves the channel's constrained capacity (i.e., the capacity for a fixed input distribution). The paper then goes on to analyze the optimal receiver and uses it to generate tight upper and lower bounds on the constrained capacity. Knowing this constrained capacity is essential to judge the efficiency of coding schemes for the channel; it performs the same function as BPSK capacity for the AWGN channel in judging LDPC codes. The paper then goes on to present a practicable correlation based receiver that uses a novel iterative channel estimation technique. The performance of this receiver remains close to the constrained capacity as long as the per-user SNR is low; there is no requirement on the aggregate SNR. With 50 users, 50 receivers and a brickwall fading channel with a coherence length of 200 symbols, for example, the correlation based receiver achieves a sum rate of 36 bits/sec/Hz, significantly greater than any current cellular standards.

This paper calculates both an upper bound and a constructive lower bound on the capacity of an N transmitter, K receiver MIMO fading network. The channel between the transmitters and the receivers is Rayleigh flat fading with fading coefficients unknown to both transmitters and receivers. The lower bound is derived from a practicable successive decoding scheme, and when N is significantly larger than K, it approaches the upper bound with increasing coherence length of the fading process. Obviously, in the limit of large coherence lengths, the system becomes coherent and so is trivial. However, the lower and upper bounds of this paper are close to the MIMO capacity even when the system is highly non-coherent. For example, with N = 50, K = 15 and a coherence length of 200, the achievable rate of the successive decoding scheme diverges from the upper bound by just 6%, even when it is only 40% of coherent capacity. At this design point, the scheme achieves a rate of 13 bits/sec/Hz, significantly greater than any current cellular standards

This paper calculates the capacity of continuous phase modulation (CPM) schemes, modeling CPM as a finite state machine. The novel capacity-calculation algorithm gives a reliable estimate of the capacity using minimal computer time. This algorithm allows the production of a more generalized class of modulation schemes called generalized CPM, which have a higher capacity than traditional CPM schemes of comparable bandwidth

A cost-effective fault-tolerant architecture called FAUST is presented for ATM switches. The key idea behind the architecture is the incorporation of spare units and associated commutation logic into strategic partitions of the switching system. The definition of a replaceable unit is flexible, and based on packaging considerations. The commutation logic can switch in a spare unit in place of a failed one at cell rate, and is distributed entirely in the existing switch control units. So the additional overhead is almost entirely in the spare modules provided. The technique is far superior to a duplex configuration in terms of reliability improvement vs. component redundancy, and can be applied to established architectures for ATM switches, including multistage sort and shared memory based architectures. Its scalability also makes it applicable to system sizes from a few tens of lines to a few thousand.>

Any architectural or operational inefficiencies in multiprocessors with thousands of processors are likely to have a significant negative impact on the performance of the system. The authors examine two such issues in large-scale shared memory multiprocessors-the delays involved in accessing global shared memory, and the low processor utilization resulting from inefficient partitioning of the system among several tasks. These studies are undertaken using a simulation model that directly integrates the nondeterministic interconnection network delays encountered during shared memory accesses into the execution of tasks on processors. The results show the quantitative impact of interconnection network delay on system performance and point to ways of reducing this impact. Furthermore, when incoming tasks have large processor requirements, the system's inability to partition the processors among several tasks efficiently has a significant detrimental effect on performance. The effectiveness of some techniques to solve this partitionability problem is discussed.>

The architecture and performance of binary shuffle-exchange networks of any size are investigated. It is established that a network with a shuffle-exchange stages whose number equals the least integer >or=log/sub 2/N or a single recirculating stage can provide the connectivity between N inputs and N outputs using a distributed tag-based control algorithm. Control tags depend on both source and destination when N is not a power of two and can be computed in a simple manner. Several structural and dynamic properties of the network are established, contrasting the behavior of the power-of-two and composite sized systems. The performance of the network in a stochastic environment is investigated analytically. It is shown that the shuffle-exchange networks behave in much the same way with respect to traffic and buffer capacity regardless of whether the system size is a power of two or not.>

A class of interconnection networks called composite binary n-cube networks is presented in this paper for multiprocessors. These networks provide a spectrum of performance levels (measured in terms of message delays or network bandwidth) at different switching costs. At the low end of this spectrum is a structure called the expanded indirect binary n-cube (a multistage network), and at the high end is the well known hypercube structure. All members of this class have the same external connectivity between nodes, but utilize different internal switching architectures within the nodes. The distributed control algorithm for these networks is similar to those for multistage and hypercube architectures. An analytical model for the performance of these networks is also presented in this paper. Results of this model show that message delays decrease by about 40% from the low end architecture to the high end of the spectrum; however, the improvements in performance diminish near the high end. Thus for best performance/cost ratios within this class, our studies indicate that an intermediate architecture needs to be chosen.

A mathematical model for predicting the performance of the direct binary n-cube interconnection scheme is presented. These predictions are checked against simulations of a comparable system. The results for the network are compared to known results for indirect interconnection schemes like the crossbar and indirect n-cube networks. Special operation conditions such as broadcasts and hot spots are considered. The following main inferences can be drawn from the study. Indirect networks need to use switches of size significantly larger than 2*2 to equal or better the performance of the hypercube system, under equiprobable distribution of message destinations. Sources attached to nodes in the direct network must be capable of generating multiple messages in a cycle to exploit the available bandwidth fully which is a key difference from the indirect networks. A variant of the standard broadcast algorithm introduced achieves a balanced distribution of network traffic, permitting the hypercube to support significant amounts of broadcast messages. These studies indicate that the transient effects of potential hot spot nodes on the background messages are small in the case of the hypercube.>

The implementation of an instruction reorganizer for a floating-point microprocessor with a variable-length pipeline is described. The reorganizer is designed to work with compiler-generated or hand-written assembly language code. A greedy heuristic algorithm is used to reorder instructions inside basic blocks. Memory aliasing is handled by accepting dependency-resolving directives from either the compiler or the assembly language programmer. Benchmark of the reorganizer using the Basic Linear Algebra Subprograms and the Livermore Loops are presented.>

We present some novel architectures for rearrangeably nonblocking multistage photonic space switches implemented using arrays ofTi:LiNbO_{3}directional couplers. Multistage networks, studied mostly in the electronic domain, are obtained by minimizing the number of 2 × 2 elements needed to implement a switch. Unfortunately, straightforward extensions of these networks to the photonic domain show that the switch size has to be severely limited by the crosstalk in each of theTi:LiNbO_{3} 2 \times 2switching elements. Our networks, on the other hand, have a controllable (including almost zero) amount of crosstalk, low optical path loss, and an asymptotically optimal number of directional coupler switches for a given switch size. In addition, the switch has a simple control algorithm and its performance for light loading appears very promising. The switch is easily decomposable into smaller arrays of no more than two types, making it easy to partition the switch into chips. At the cost of a slight increase in crosstalk, the switch can be made single fault tolerant in terms of its ability to connect any input to any output.

Performance of a class of multistage interconnection networks employing redundant paths is investigated. Redundant path networks provide significant tolerance to faults at minimal costs; in this paper improvements in performance and very graceful degradation are also shown to result from the availability of redundant paths. A Markov model is introduced for the operation of these networks in the circuit-switched mode and is solved numerically to obtain the performance measures of interest. The structure of the networks that provide maximal performance is also characterized.

A general class of fault-tolerant multistage interconnection networks is presented, wherein fault-tolerance is achieved by providing multiple disjoint paths between every input and output. These networks are derived from the Omega networks and as such retain all the connection properties of the parent networks in the absence of faults. An R-path network in this class can tolerate (R-1) arbitrary faults in the intermediate stages of the network at a cost that is far less than providing R copies of the original network. Different techniques for constructing such networks are presented and relevant properties and control algorithms are investigated.