Harald Ruess

dblp:28/800 · also Harald Rueß · DBLP profile ↗
← Back
41ranked-venue papers
7as first author
4since 2021 · last 2025
0000-0002-1405-2990ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 30 · 4 first-author · 3 since 2021Theory of computation · 26 · 7 first-author · 3 since 2021Artificial intelligence and machine learning · 6 · 2 first-author · 2 since 2021Systems, architecture and hardware · 2Security and privacy · 2
YearPublicationVenuePosition
2025 Runtime Monitoring and Enforcement of Conditional Fairness in Generative AIs
Chih-Hong Cheng, Changshun Wu, Xingyu Zhao 0001, Saddek Bensalem, Harald Ruess
RV5
2024 A Decision Method for First-Order Stream Logic
abstract
Abstract Our main result is a doubly exponential decision procedure for the first-order equality theory of streams with addition, convolution, and control-oriented stream operations. This stream logic is shown to be expressive for solving basic problems in stream calculus.
Harald Ruess
IJCAR (2)1
2023 The Next Big Thing: From Embedded Systems to Embodied Actors
Harald Ruess
FM1
2021 Proof Search and Certificates for Evidential Transactions
abstract
Abstract Attestation logics have been used for specifying systems with policies involving different principals. Cyberlogic is an attestation logic used for the specification of Evidential Transactions (ETs). In such transactions, evidence has to be provided supporting its validity with respect to given policies. For example, visa applicants may be required to demonstrate that they have sufficient funds to visit a foreign country. Such evidence can be expressed as a Cyberlogic proof, possibly combined with non-logical data (e.g., a digitally signed document). A key issue is how to construct and communicate such evidence/proofs. It turns out that attestation modalities are challenging to use established proof-theoretic methods such as focusing. Our first contribution is the refinement of Cyberlogic proof theory with knowledge operators which can be used to represent knowledge bases local to one or more principals. Our second contribution is the identification of an executable fragment of Cyberlogic, called Cyberlogic programs, enabling the specification of ETs. Our third contribution is a sound and complete proof system for Cyberlogic programs enabling proof search similar to search in logic programming. Our final contribution is a proof certificate format for Cyberlogic programs inspired by Foundational Proof Certificates as a means to communicate evidence and check its validity.
Vivek Nigam, Giselle Reis, Samar Rahmouni, Harald Ruess
CADE4
2018 Neural networks for safety-critical applications - Challenges, experiments and perspectives
abstract
We propose a methodology for designing dependable Artificial Neural Networks (ANNs) by extending the concepts of understandability, correctness, and validity that are crucial ingredients in existing certification standards. We apply the concept in a concrete case study for designing a highway ANN-based motion predictor to guarantee safety properties such as impossibility for the ego vehicle to suggest moving to the right lane if there exists another vehicle on its right.
Chih-Hong Cheng, Frederik Diehl, Gereon Hinz, Yassine Hamza, Georg Nührenberg, Markus Rickert 0001, Harald Ruess, Michael Truong-Le
DATE7
2018 Evidential and Continuous Integration of Software Verification Tools
Tewodros A. Beyene, Harald Ruess
FM2
2018 Towards Dependability Metrics for Neural Networks
abstract
Artificial neural networks (NN) are instrumental in realizing highly-automated driving functionality. An overarching challenge is to identify best safety engineering practices for NN and other learning-enabled components. In particular, there is an urgent need for an adequate set of metrics for measuring all- important NN dependability attributes. We address this challenge by proposing a number of NN-specific and efficiently computable metrics for measuring NN dependability attributes including robustness, interpretability, completeness, and correctness.
Chih-Hong Cheng, Georg Nührenberg, Chung-Hao Huang, Harald Ruess, Hirotoshi Yasuoka
MEMOCODE4
2017 Automated Analysis of Multi-View Software Architectures
abstract
Software architectures usually are comprised of different views for capturing static, runtime, and deployment aspects. What is currently missing, however, are formal validation and verification techniques of multi-view architecture in very early phases of the software development lifecycle. The main contribution of this paper therefore is the construction of a single formal model (in Promela) for certain stylized, and widely used, multi-view architectures by suitably interpreting and fusing sub-models from different UML diagrams. Possible counter-examples produced by model checking are fed back as test scenarios for debugging the multi-view architectural model. We have implemented this algorithm as a plug-in for the Enterprise Architect development tool, and successfully used SPIN model checking for debugging some industrial architectural multi-view models by identifying a number of undesirable corner cases.
Chih-Hong Cheng, Yassine Hamza, Harald Ruess
APSEC3
2017 Maximum Resilience of Artificial Neural Networks
Chih-Hong Cheng, Georg Nührenberg, Harald Ruess
ATVA3
2017 autoCode4: Structural Controller Synthesis
Chih-Hong Cheng, Edward A. Lee, Harald Ruess
TACAS (1)3
2016 Structural Synthesis for GXW Specifications
Chih-Hong Cheng, Yassine Hamza, Harald Ruess
CAV (1)3
2016 Compositional Parameter Synthesis
Lacramioara Astefanoaei, Saddek Bensalem, Marius Bozga, Chih-Hong Cheng, Harald Ruess
FM5
2016 Certification for μ-Calculus with Winning Strategies
Martin Hofmann 0001, Christian Neukirchen, Harald Ruess
SPIN3
2014 G4LTL-ST: Automatic Generation of PLC Programs
Chih-Hong Cheng, Chung-Hao Huang, Harald Ruess, Stefan Hauck-Stattelmann
CAV3
2013 JBernstein: A Validity Checker for Generalized Polynomial Constraints
Chih-Hong Cheng, Harald Ruess, Natarajan Shankar
CAV2
2012 MGSyn: Automatic Synthesis for Industrial Automation
Chih-Hong Cheng, Michael Geisinger, Harald Ruess, Christian Buckl, Alois C. Knoll
CAV3
2012 Game solving for industrial automation and control
abstract
An ongoing effort within the community of verification and program analysis is to raise the level of abstraction in programming by automatic synthesis. In this paper, we demonstrate how our synthesis engine GAVS+ achieves this goal by automatically creating control code for the FESTO Modular Production System. The overall approach is model-driven: we reinterpret planning domain definition language (PDDL) as a design contract to model two-player games played between control and environment, such that users can describe (i) basic abilities of hardware components, including sensors (as environment moves) and actuators (as control moves), (ii) topologies how components are interconnected, and (iii) desired specification under a restricted class of linear temporal logic. The model is processed by our game-based synthesis engine, from which intermediate code is generated. By mapping each behavioral-level action to a sequence of low-level PLC control commands, we transform the intermediate code into an executable program. The efficiency of our engine enables to synthesize every scenario presented in this paper within seconds. When the specification evolves, this implies a huge time-gain compared to manual program modification.
Chih-Hong Cheng, Michael Geisinger, Harald Ruess, Christian Buckl, Alois C. Knoll
ICRA3
2012 Behavioral Specification Based Runtime Monitors for OSGi Services
Jan Olaf Blech, Yliès Falcone, Harald Ruess, Bernhard Schätz
ISoLA (1)3
2011 Algorithms for Synthesizing Priorities in Component-Based Systems
Chih-Hong Cheng, Saddek Bensalem, Yu-Fang Chen 0001, Rongjie Yan, Barbara Jobstmann, Harald Ruess, Christian Buckl, Alois C. Knoll
ATVA6
2011 Synthesis of Fault-Tolerant Embedded Systems Using Games: From Theory to Practice
Chih-Hong Cheng, Harald Ruess, Alois C. Knoll, Christian Buckl
VMCAI2
2008 Non-functional Avionics Requirements
Michael Paulitsch, Harald Ruess, Maria Sorea
ISoLA2
2004 SAL 2
Leonardo de Moura 0001, Sam Owre, Harald Ruess, John M. Rushby, Natarajan Shankar, Maria Sorea, Ashish Tiwari 0001
CAV3
2004 An Experimental Evaluation of Ground Decision Procedures
Leonardo de Moura 0001, Harald Ruess
CAV2
2004 Feature-Based Decomposition of Inductive Proofs Applied to Real-Time Avionics Software: An Experience Report
abstract
The hardware and software in modern aircraft control systems are good candidates for verification using formal methods: they are complex, safety-critical, and challenge the capabilities of test-based verification strategies. We have previously reported on our use of model checking to verify the time partitioning property of the Deos/spl trade/ real-time operating system for embedded avionics. The size and complexity of this system have limited us to analyzing only one configuration at a time. To overcome this limit and generalize our analysis to arbitrary configurations we have turned to theorem proving. This paper describes our use of the PVS theorem prover to analyze the Deos scheduler. In addition to our inductive proof of the time partitioning invariant, we present a feature-based technique for modeling state-transition systems and formulating inductive invariants. This technique facilitates an incremental approach to theorem proving that scales well to models of increasing complexity, and has the potential to be applicable to a wide range of problems.
Vu Ha, Murali Rangarajan, Darren D. Cofer, Harald Ruess, Bruno Dutertre
ICSE4
2003 Bounded Model Checking and Induction: From Refutation to Verification (Extended Abstract, Category A)
Leonardo de Moura 0001, Harald Ruess, Maria Sorea
CAV2
2003 Monadic Second-Order Logics with Cardinalities
Felix Klaedtke, Harald Ruess
ICALP2
2002 Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
Leonardo de Moura 0001, Harald Ruess, Maria Sorea
CADE2
2002 Combining Shostak Theories
Natarajan Shankar, Harald Ruess
RTA2
2001 ICS: Integrated Canonizer and Solver
Jean-Christophe Filliâtre, Sam Owre, Harald Ruess, Natarajan Shankar
CAV3
2001 Proving Secrecy is Easy Enough
abstract
We develop a systematic proof procedure for establishing secrecy results for cryptographic protocols. Part of the procedure is to reduce messages to simplified constituents, and its core is a search procedure for establishing secrecy results. This procedure is sound but incomplete in that it may fail to establish secrecy for some secure protocols. However, it is amenable to mechanization, and it also has a convenient visual representation. We demonstrate the utility of our procedure with secrecy proofs for standard benchmarks such as the Yahalom protocol. 1
Véronique Cortier, Jonathan K. Millen, Harald Ruess
CSFW3
2001 Deconstructing Shostak
abstract
Decision procedures for equality in a combination of theories are at the core of a number of verification systems. R.E. Shostak's (J. of the ACM, vol. 31, no. 1, pp. 1-12, 1984) decision procedure for equality in the combination of solvable and canonizable theories has been around for nearly two decades. Variations of this decision procedure have been implemented in a number of specification and verification systems, including STP, EHDM, PVS, STeP and SVC. The algorithm is quite subtle and a correctness argument for it has remained elusive. Shostak's algorithm and all previously published variants of it yield incomplete decision procedures. We describe a variant of Shostak's algorithm, along with proofs of termination, soundness and completeness.
Harald Ruess, Natarajan Shankar
LICS1
2001 A Technique for Invariant Generation
Ashish Tiwari 0001, Harald Ruess, Hassen Saïdi, Natarajan Shankar
TACAS2
2000 Rigid E-Unification Revisited
Ashish Tiwari 0001, Leo Bachmair, Harald Ruess
CADE3
2000 Integrating WS1S with PVS
Sam Owre, Harald Ruess
CAV2
2000 Protocol-Independent Secrecy
abstract
Inductive proofs of secrecy invariants for cryptographic protocols can be facilitated by separating the protocol dependent part from the protocol-independent part. Our secrecy theorem encapsulates the use of induction so that the discharge of protocol-specific proof obligations is reduced to first-order reasoning. Also, the verification conditions are modularly associated with the protocol messages. Secrecy proofs for Otway-Rees (1987) and the corrected Needham-Schroeder protocol are given.
Jonathan K. Millen, Harald Ruess
S&P2
1999 Modular Verification of SRT Division
Harald Ruess, Natarajan Shankar, Mandayam K. Srivas
Formal Methods Syst. Des.1
1998 Solving Bit-Vector Equations
M. Oliver Möller, Harald Ruess
FMCAD2
1997 An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors
David Cyrluk, M. Oliver Möller, Harald Ruess
CAV3
1996 Reflection of Formal Tactics in a Deductive Reflection Framework
Harald Ruess
CADE1
1996 Modular Verification of SRT Division
Harald Ruess, Natarajan Shankar, Mandayam K. Srivas
CAV1
1996 Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study
Harald Ruess
FMCAD1