Jinglin Han

dblp:280/2341 · DBLP profile ↗
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7ranked-venue papers
2as first author
6since 2021 · last 2026
0000-0002-1777-2686ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 first-author · 4 since 2021Computer networks · 2 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
YearPublicationVenuePosition
2026 TOGLAS: Transistor-level OpAmp design Generation with Large language model-Assisted hierarchical topology Synthesis
Jinglin Han, Peng Wang 0022
Integr.1
2025 TPC-GAN: Batch Topology Synthesis for Performance-Compliant Operational Amplifiers Using Generative Adversarial Networks
abstract
Operational amplifier is one of the most important analog basic blocks. Existing automated synthesis strategies for operational amplifiers solely focus on the optimization of single topology, making them unsuitable for scenarios requiring batch synthesis, such as dataset augmentation. In this paper, we in-troduce TPC-GAN, a generative model for batch topology syn-thesis of operational amplifiers in accordance with performance specifications. To be specific, it incorporates a reward network of circuit performance into the adversarial generative networks (GANs). This enables direct synthesis of novel and feasible circuit topology meeting performance specifications. Experimental results demonstrate that our proposed method can achieve a validity rate of 98% in circuit generation, among which 99.7% are novel relative to the training dataset. With the introduction of a reward network, a significant portion (82.8%) of the generated circuits satisfy performance specifications, which is a substantial improvement than those without. Transistor-level experimental results further demonstrate the practicality and competitiveness of our generated circuits with nearly 3x improvement over manual designs.
Yuhao Leng, Jinglin Han, Peng Wang 0022
DATE2
2024 TSO-Flow: A Topology Synthesis and Optimization Workflow for Operational Amplifiers with Invertible Graph Generative Model
abstract
Topology is one of the dominant factors governing analog circuit performance but its automatic design remains elusive. Most analog circuit topology designs are largely dependent on human expertise or a limited set of classic structures. To explore the potential of AI-driven design of analog circuit, we propose an automatic generation and optimization workflow, TSO-Flow, for the behavioral-level design of three-stage operational amplifiers. To be specific, TSO-Flow employs an invertible graph generative model to transform discrete circuit topology into a continuous latent representation. By random sampling in the latent space, one can generate an ensemble of latent vectors which can be translated back to novel circuit topology. In contrast to previous methods, such forward and reverse transformations are analytically invertible and thus enable exact likelihood estimation for training. Furthermore, one can optimize the topology in the latent space where a surrogate model is introduced for performance prediction. We evaluate the proposed framework with state-of-the-art methods via experiments on three-stage operational amplifiers. The results demonstrate that TSO-flow provides up to 116% improvements on FoM, 61% reduction in power, 50% less simulations and an overall 5x efficiency enhancement over the baseline methods1.
Jinglin Han, Yuhao Leng, Xiuli Zhang, Peng Wang 0022
ICCAD1
2023 Deep reinforcement learning assisted reticle floorplanning with rectilinear polygon modules for multiple-project wafer
Zehua Fang, Jinglin Han, Huaxinyu Wang
Integr.2
2021 Accurate haplotype-resolved assembly reveals the origin of structural variants for human trios
abstract
MOTIVATION: Achieving a near complete understanding of how the genome of an individual affects the phenotypes of that individual requires deciphering the order of variations along homologous chromosomes in species with diploid genomes. However, true diploid assembly of long-range haplotypes remains challenging. RESULTS: To address this, we have developed Haplotype-resolved Assembly for Synthetic long reads using a Trio-binning strategy, or HAST, which uses parental information to classify reads into maternal or paternal. Once sorted, these reads are used to independently de novo assemble the parent-specific haplotypes. We applied HAST to cobarcoded second-generation sequencing data from an Asian individual, resulting in a haplotype assembly covering 94.7% of the reference genome with a scaffold N50 longer than 11 Mb. The high haplotyping precision (∼99.7%) and recall (∼95.9%) represents a substantial improvement over the commonly used tool for assembling cobarcoded reads (Supernova), and is comparable to a trio-binning-based third generation long-read-based assembly method (TrioCanu) but with a significantly higher single-base accuracy [up to 99.99997% (Q65)]. This makes HAST a superior tool for accurate haplotyping and future haplotype-based studies. AVAILABILITY AND IMPLEMENTATION: The code of the analysis is available at https://github.com/BGI-Qingdao/HAST. SUPPLEMENTARY INFORMATION: Supplementary data are available at Bioinformatics online.
Lidong Guo, Brock A. Peters, Ou Wang, Jun Wang 0004, Zhesheng Jiang, Jinglin Han, Huanming Yang, Xin Liu 0007, Jie Huang 0026, Guangyi Fan
Bioinform.11
2021 Resource Allocation and 3-D Placement for UAV-Enabled Energy-Efficient IoT Communications
abstract
As the commercial launch of the fifth-generation (5G) wireless communications gets near, the trend from the Internet of Things (IoT) to the Internet of Everything (IoE) is emerging. Due to the advantages of the high mobility, high Line-of-Sight (LoS) probability and low labor cost, unmanned aerial vehicles (UAVs) may play an important role in the future IoT communication networks, e.g., data collection in remote areas. In this article, we study the 3-D placement and resource allocation of multiple UAV-mounted base stations (BSs) in an uplink IoT network, where the balanced task for the UAV-BSs, the limited channel resource, and the signal interference are taken into consideration. In the considered system, the total transmission power of IoT devices is minimized, subject to a signal-to-interference-and-noise ratio (SINR) threshold for each device. First, aiming to balance the task of each UAV, we propose a clustering algorithm based on an improved$K$-means method to divide IoT devices into several groups so that the number of devices in each group is roughly the same. Then, based on matching theory, a modified-Hungarian-based dynamic many–many matching (HD4M) algorithm is designed for assigning subchannels to IoT devices, which can efficiently mitigate the interference. Finally, we jointly optimize the transmission power of IoT devices and the altitudes of UAVs via an alternating iterative method. The simulation results show that the total transmission power decreases significantly after applying the proposed algorithms.
Yanming Liu 0002, Kai Liu 0005, Jinglin Han, Lipeng Zhu 0001, Zhenyu Xiao, Xiang-Gen Xia 0001
IEEE Internet Things J.3
2020 Research on load forecasting model on power sensor net
abstract
The business process of load forecasting algorithm for distribution network planning is studied in depth, and the work steps of load forecasting in different places are discussed according to different planning objectives. Then, based on power sensor net, we systematically describes various power demand forecasting models and related theories, as well as their respective application scenarios. Finally, on the basis of theoretical research, relevant experiments are carried out, and the economic benefits of load forecasting are analyzed and discussed by using reliability evaluation method.
Jiakun An, Jinglin Han, Yunjie Lei
MSN4