In this paper, we present a new compact model of threshold switching devices which is suitable for efficient circuit-level simulations. First, a macro model, based on a compact transistor based circuit, was implemented in LTSPICE. Then, a descriptive model was extracted and implemented in MATLAB, which is based on the macro model. This macro model was extended to develop a physical model that describes the processes that occur during the threshold switching. The physical model derived comprises a delay structure with few electrical components adjacent to the second junction. The delay model incorporates an internal state variable, which is crucial to transform the descriptive model into a compact model and to parameterize it in terms of electrical parameters that represent the component’s behavior. Finally, we applied our model by fitting measured$i-v$data of an OTS device manufactured by Western Digital Research.

We present a compact, continuous, and numerically stable version of a tantalum oxide (TaOx) memristor model which can be employed for robust and reliable simulations of large scale memristor based circuits. The original model contains a piecewise differentiable function in the memductance expression and discontinuous step functions in the state equation. Additionally, the original model does not set a proper upper bound for the state variable and may admit blowing up solutions due to an exponential power term, preventing the use of it for numerically reliable simulations. Considering these drawbacks, we modify the original model so as to i) simplify the memductance function while removing its piecewise differentiable nonlinearity, ii) include a proper window function for the ON state dynamics, which is missing in the original model, iii) modify and bound the exponential power term to prevent an uncontrollable blow-up of the solutions, and iv) apply a process called unification, allowing us to remove the step functions inherent in the model, which is a novelty in state-limited memristor models. We validate the accuracy of the proposed model via DC and transient simulations, dynamic route map analysis and a Spice implementation of an anti-series configuration, showing the applicability of the model.

In this paper, we present a compact memristor model for bipolar neuromorphic ReRAM devices. The proposed model focuses on the high level description of the device, and it reproduces some of the most important characteristics (i.e. conductance, energy dissipation) without needing a detailed electrical simulation. Its functionality is shown by using it to model the behavior of three different ReRAM devices that were fabricated and measured at the CNR-IMM, MDM Laboratory. The parameters extraction procedure is also discussed. The obtained results clearly show that the model proposed in this paper is able to capture the influence of the programming pulse parameters (i.e. pulse duration and height) changes. This is accomplished by the introduction of a parameter, which is related to the specific device technology.

This paper presents a circuit-theoretic analysis of a NbO2-Mott memristor fabricated at Hewlett-Packard Labs. It investigates mechanisms behind the origin of complexity based on local activity, which characterizes the behavior of this outstanding nanodevice. We propose an accurate, particularly simplified version of a recently introduced physical model suitable for large-scale circuit simulations. Following the concept of local activity, we then conduct a small-signal circuit-theoretic derivation of the impedance and associated small-signal equivalent circuit elements to analyze device stability and frequency response. Finally, our analysis reveals locally active operating regions, as well as regions where the device dynamics are positioned on the edge of chaos. The latter regions are crucial for designing bio-inspired computing systems.

Most of the previous investigations are dealing with the derivation of memristor models in voltage-current V-I domain. Recently, the flux-charge Ø - Q approach has been introduced by F. Corinto et al. [1] showing the capability to simulate the behaviour of a memristive device for a wide range of input signals. A simple memristor model for neuromorphic ReRAM devices derived in the flux-charge domain will be proposed in this paper. Thereby, special attention has been paid to the switching kinetics of a ReRAM memristive device excited by pulses of different height and width. The obtained theoretical results, which have been compared to measurements, exhibit a high accuracy in all treated cases, thus supporting the development of memory and logic applications using ReRAM elements.

In this work we present a methodology to design circuits emulating memristive behaviour. This methodology is based initially on a charge and flux description of the system, and the equations are decomposed into blocks that can be implemented using very simple CMOS topologies. As an example, we implement a simple memristor with long term memory, showing that the resulting system behaves as expected using either voltage ramps or pulses as the driving signals.