Since several decades, fault tolerance has become a major research field due to transistor shrinking and core number increasing in system-on-chip (SoC). Especially, faults occurring to the network-on-chips (NoCs) of those systems have a significant impact, due to the high amount of data, crossing the NoC, for the communication among intellectual properties (IPs). Furthermore, existing fault-tolerant approaches cannot efficiently deal with several permanent faults, which occur in NoC routers. To address these limitations, we propose the bit shuffling method (BiSuT) for fault-tolerant NoCs that reduces the impact of faults on data communications. To achieve that, the proposed approach exploits, at runtime, the position of permanent faults and changes the order of bits inside a flit. Our method reduces, as much as possible, the impact of faults by transferring the faults on least significant bits (LSBs), instead of keeping them on most significant bits (MSBs). The results obtained by extensive evaluations show that BiSuT can reduce the impact of multiple permanent faults, with low hardware costs, compared to the existing approaches, like the Hamming code.

Since several decades, fault tolerance has become a major research field, due to transistor shrinking and core number increasing in System-on-Chip (SoC). Especially, faults occurring at the Network-on-Chips (NoCs) of those systems have a significant impact, since NoCs are the key component of on-chip communication. Several fault tolerant approaches have been proposed, which are, however, limited against multiple permanent faults. To reduce the impact of these faults on the data communications, we propose a bit-shuffling method for fault tolerant NoCs. The proposed approach exploits, at runtime, the position of the permanent faults and changes the order of bits inside a flit. Our bit-shuffling method reduces as much as possible the fault impact, by transferring the faults from Most Significant Bits (MSBs) towards Least Significant Bits (LSBs). With this technique, we show that, in presence of multiple permanent faults, the Mean Square Error (MSE) on the payload transmission is reduce from 1017to 105under three permanent fault for 32-bit unsigned integers. This technique also ensures the correct transmission of headers under multiple permanent faults.