The theory of incremental Delta-Sigma (I-DS) converters relies on memoryless operation between consecutive Nyquist samples. This is achieved by resetting the analog loop-filter and digital reconstruction filter every Nyquist period. It is shown that the use of reconstruction filters with negligible first-sample weights opens the possibility of removing the periodic reset from the analog loop filter of incremental Delta-Sigma modulator (I-DSM) while maintaining memoryless operation. The periodic reset can further be removed from reconstruction filters whose impulse response is inherently finite. Combining the two features enables free-running Delta-Sigma (DS) converters to be used in time-domain multiplexing applications and without inter-channel interference.

This article presents a wireless neuromodulation headstage prototype intended for in-vitro recording and stimulation in freely behaving mice. The prototype allows independent stimulation on 32 channels and can record up to 32channels in the local field potential (LFP) band, while the simultaneous recording in the action potential (AP) band is limited to 3 channels when data is not compressed. All recorded data is directly streamed via Bluetooth Low Energy (BLE), enabling immediate analysis during the experiment. The small size of 20x24 x8 mm and a low total weight of 3.9g makes this neurologger suitable to be used on small rodents such as mice. A moderate power consumption of 29.3mW for 32channel recording and transmission of LFP band data ensures a long uninterrupted operation of almost 5hours.

This paper presents a power and area efficient digital communication interface for tiny distributed direct digitizing neural recorder ASICs on an ultra-flexible neural implant in a bus-like structure in order to realize a NeuroBus. The digital interface only requires 3 pins, does not need any preprogramming or trimming for address allocation and achieves a very low core area. The digital interface was implemented in a 1.2V 180nm CMOS technology and supports up to 100 spatially distributed neural recorder ASICs, consuming only$9\ \mu\mathrm{W}$of power per channel on a tiny area of$2380\ \mu\mathrm{m}^{2}$.

Stimulation waveforms and artifacts can exceed the neural signal of interest by several orders of magnitude, thus requiring blanking switches to avoid saturation of the front-end and extensive subsequent recorder blind-time during the recovery. Several recent publications propose to instead utilize recording front-ends with high dynamic range, however typically at the cost of reduced first-stage gain and an adversely affected noise efficiency factor. Recently, we have demonstrated a combination of blanking switches and a tuning mechanism for the pseudo-resistor based high-pass corner frequency in a recorder to achieve rapid artifact recovery by temporarily increased settling speed. In this article, we extent this by an in-depth analysis and significantly improve the artifact recovery abilities by utilizing a combination of passive electrode discharge and recorder reset, thereby improving the recovery time after stimulation significantly, to less than 10in spike recordings with maximum gain setting of 70. The measurements are conducted with a new hardware platform, and extensive in-vitro verification is provided to demonstrate the feasibility of the combined artifact recovery.

This paper presents an extensive study of pseudo-resistors for usage in biomedical applications like implantable brain-machine-interfaces. In order to suppress DC offsets while simultaneously recording signals ranging into the sub-hertz domain, low-frequency high-pass filters are employed in the frontend of neural recording integrated circuitry. With the limited ranges of on-chip passives, no sub-hertz corner frequencies are possible. Switch-capacitor resistances and resistor duty-cycling are infeasible since these techniques cannot provide the required absolute resistance values. Concepts like multi-rate duty-cycled resistors have been successfully demonstrated, but require clock signals, which can lead to noise back-folding, especially in chopped systems. Pseudo-resistors utilize the off-resistance of MOSFETs to form extraordinary large resistors, and are thus capable of providing the required corner frequency in a very area efficient way. The drawbacks are limited linearity, and deviations of 100x over process variation and temperature were reported in prior art. In this brief we show measurement results from more than 160 dice (>5400 recording channels) from 3 production runs to demonstrate that the variations are much less severe in realistic operating conditions, and that sufficient linearity can be achieved. Our experiments let us conclude that the usage of pseudo-resistors in neural recording applications can in fact be used to robustly realize the required HP corner frequency for electrode DC offset blocking.

Physical Unclonable Functions utilize random variations from manufacturing to generate unpredictable, yet repeat-able fingerprints of devices for usage in a hardware cryptographic context. Most often, they are dedicated electrical circuits in integrated devices and thus occupy additional space while only few implementations exploiting already existing hardware. In this work, we analyze the possibility to extract hardware unique fingerprints from the distinct differential nonlinearities of analog-to-digital converters, which are present in almost every system. The transfer curves from measuring a large set of low-cost analog-to-digital converters with 12 bit resolution are analyzed regarding their quality as system fingerprints. Additional postprocessing methods are investigated for further improvement of the uniqueness metrics. The fingerprints are optimized to a perfect inter-hamming distance of 50% and close-to-maximum entropy. These improvements come at the cost of a reduced number of extracted bits, yet the minimum achieved number of 440 bits is sufficient for secret key generation. By thresholding and consequently avoiding unstable positions in the extracted bit-strings, the intra-hamming distance of unprocessed transfer curves could be reduced to less than 4%. Further measurements over a large temperature range shows that the error rate due to temperature drift never exceeds 13%.

Modern neuromodulation systems feature parallel low-noise recording on a large number of channels, limiting the available area per channel. This has made chopper-stabilization the modality of choice for many recently published implementations. To tackle the issue of decreased input impedance, the auxiliary path boosting scheme can be used, which minimizes the amount of charge drawn from the electrode by precharging the input capacitors through a voltage buffer. However, the offset of the buffer translates to a deterministic amount of charge per time that is transfered to the electrodes and accelerates electrode aging. If blocking capacitors are used as a safety feature, the offset-induced charge can lead to a voltage drift due to charge accumulation, that slowly saturates the buffers. This paper presents a voltage buffer that uses a self-compensation scheme to reduce the time-averaged offset to sub - 20 μV, thereby minimizing excess charge.